benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.

llvm-svn: 118701

llvm-svn: 118699

instructions instead of hard-coding operand numbers.

llvm-svn: 118698

nodes can be used in loops, this could result in infinite looping
if there is no recursion limit, so add such a limit.  It is also
used for the SelectInst case because in theory there could be an
infinite loop there too if the basic block is unreachable.

llvm-svn: 118694

it, and to be consistent.

llvm-svn: 118692

double quoting of ObjC symbol names in constant pool entries.

rdar://8652107

llvm-svn: 118688

arbitrary memory into a helper function, and adjust some comments.

llvm-svn: 118687

llvm-svn: 118683

llvm-svn: 118681

The simplifications performed here never create new instructions, they
only return existing instructions (or a constant), and so are always a
win.  In theory they should transform (for example)
  %z = and i32 %x, %y
  %s = select i1 %cond, i32 %y, i32 %z
  %r = and i32 %x, %s
into
  %r = and i32 %x, y
but in practice they get into a fight with instcombine, and lose.
Unfortunately instcombine does a poor job in this case.  Nonetheless
I'm committing this transform to make it easier to discuss what to
do to make peace with instcombine.

llvm-svn: 118679

Win32/Process.inc: [PR8527] Process::FileDescriptorIsDisplayed(fd) should not check by FILE_TYPE_CHAR. It must be better to check it with Console API.

The special file "NUL" is FILE_TYPE_CHAR with GetFileType(h). It was treated as display device and discarding output to NUL had failed. (eg. opt -o nul)

llvm-svn: 118678

VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623

llvm-svn: 118671

llvm-svn: 118667

order to reduce ((x<<30)>>24) to x<<6, check the
correct bits.  PR 8547.

llvm-svn: 118665

llvm-svn: 118662

llvm-svn: 118661

chaining and simplify FunctionAttrs' GetModRefBehavior logic.

llvm-svn: 118660

llvm-svn: 118656

llvm-svn: 118653

earlier. Implicit bool -> int conversions are evil!

llvm-svn: 118651

llvm-svn: 118648

llvm-svn: 118645

llvm-svn: 118644

as derived from the target triple.  This is important for enabling
features that are implied based on the architecture version.

llvm-svn: 118643

It is only supported for ARM code.  Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled.  This prevents a "cannot select MEMBARRIER_MCR" error in that
situation.  Radar 8644195

llvm-svn: 118642

* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.

The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.

llvm-svn: 118640

llvm-svn: 118639

help in MC'izing the references that use them.

llvm-svn: 118633

(retry now that the windows build is green)

llvm-svn: 118630

llvm-svn: 118627

memory. This isn't a real improvement with present day AliasAnalysis
implementations; it's mainly for consistency.

llvm-svn: 118624

llvm-svn: 118623

llvm-svn: 118621

llvm-svn: 118618

llvm-svn: 118617

-Wnon-virtual-dtor.

llvm-svn: 118616

llvm-svn: 118613

pseudo-label. (TLS stuff).

llvm-svn: 118609

llvm-svn: 118608

llvm-svn: 118606