perform initialization without static constructors AND without explicit initialization
by the client.  For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve.  I hope to be able to relax
the latter requirement in the future.

llvm-svn: 116334

that says what why what we just asserted is wrong.

llvm-svn: 116333

llvm-svn: 116323

llvm-svn: 116321

llvm-svn: 116319

llvm-svn: 116318

The reg-reg copies were no longer being generated since copyPhysReg copies
physical registers only.

The loads and stores are not necessary - The TC constraint is imposed by the
TAILJMP and TCRETURN instructions, there should be no need for constrained loads
and stores.

llvm-svn: 116314

ARM instructions.

llvm-svn: 116313

"-mattr=+vfp3" is specified. However, this will not work for hardware that
only supports 16 registers.  Add a new flag to support -"mattr=+vfp3,+d16".
Patch by Jan Voung!

llvm-svn: 116310

address that we've looked through.

Fixes compilation problems in tramp3d from earlier patch.

llvm-svn: 116296

llvm-svn: 116284

llvm-svn: 116280

llvm-svn: 116279

llvm-svn: 116278

llvm-svn: 116277

llvm-svn: 116276

llvm-svn: 116266

llvm-svn: 116264

stop searching when it has found a match.

llvm-svn: 116262

register operand.

llvm-svn: 116259

Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)

llvm-svn: 116257

llvm-svn: 116251

llvm-svn: 116249

This helps hiding the LiveRange class which really should be private.

llvm-svn: 116244

llvm-svn: 116240

llvm-svn: 116239

leave custom lowerings for later.

Fixes some nightly tests.

llvm-svn: 116232

virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.

This fixes PR8357.

llvm-svn: 116222

llvm-svn: 116220

llvm-svn: 116218

Also don't use fast-isel on non-darwin since it's untested.

llvm-svn: 116217

llvm-svn: 116214

matching in tblgen to do the predicate operand.

llvm-svn: 116213

llvm-svn: 116212

LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210

llvm-svn: 116201

llvm-svn: 116198

llvm-svn: 116197

llvm-svn: 116196

llvm-svn: 116195