the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.

llvm-svn: 94308

llvm-svn: 94299

a .section.  Switch to it with SwitchSection.

However, I think that this directive should be safe on any ELF target.
If so, we should hoist it up out of the X86 and SystemZ targets.

llvm-svn: 94298

llvm-svn: 94296

into a new MCDirectives.h file.

llvm-svn: 94294

stack may be misaligned.

Update test accordingly.

Patch by Evan Cheng!

llvm-svn: 94291

llvm-svn: 94286

llvm-svn: 94285

llvm-svn: 94278

target-specific AsmLexer, and added the appropriate
registration calls.

llvm-svn: 94275

be static.  Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.

llvm-svn: 94266

llvm-svn: 94254

llvm-svn: 94205

llvm-svn: 94197

this should fix a problem duncan saw handling symbols with '.' in them.

llvm-svn: 94192

llvm-svn: 94189

missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164

llvm-svn: 94147

llvm-svn: 94132

llvm-svn: 94129

llvm-svn: 94125

cannot be directly interchanged for comparisons against negated values.
Disable the CMN instructions for the time being.

llvm-svn: 94119

llvm-svn: 94098

llvm-svn: 94095

This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.

It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.

llvm-svn: 94061

Fix a minor issue in x86 load / store folding table. movups does an unaligned load so it doesn't require 16-byte alignment.

llvm-svn: 94058

this makes function stub emission determinstic.

llvm-svn: 94033

llvm-svn: 94032

no functionality change.

llvm-svn: 94030

MachineModuleInfoMachO instead.  This eliminates two sources
of nondeterministic output in the ppc backend, but function
stubs are still bad.

llvm-svn: 94029

When XDEBUG is enabled, check for SelectionDAG cycles at some key
points.  This will help us find future problems like the one
described in PR6019.

llvm-svn: 94019

llvm-svn: 94008

go completely away.

llvm-svn: 93994

stomache MCAsmInfo having this, and I found a better solution to
this layering issue.

llvm-svn: 93985

more cases where debug declarations affect
debug line info.

llvm-svn: 93953

llvm-svn: 93940

line number info.

llvm-svn: 93937

I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.

I may change this in the future, we'll see how it works out.

llvm-svn: 93934

llvm-svn: 93918

the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.

llvm-svn: 93916