destroy those types in ~LLVMContext.

llvm-svn: 134945

LinearFunctionTestReplace rewrite. No functionality.

I've been wanting to group the indvar subphases into sections and
order them by their logical sequence. My next checkin adds functions
related to LFTR, and doing the reorg now should help reviewers. Since,
most of the code in IndVarSimplify.cpp has recently been replaced or
will be replaced soon, obscuring blame should not be an issue. This
seems like an ideal time to shuffle the code around.

I'm happy to take more suggestions for cleaning up the code. Or if
you've been wanting to cleanup anything in this file yourself, now is
a good time.

llvm-svn: 134941

llvm-svn: 134922

The enum names as well as order (i.e. value)
had skewed, which means that consumers of the
tablegen-ed table would see different values than
intended. Make both files have a superset of enums,
and add classification as needed for numMCOperands.

Reviewed by Owen Anderson

llvm-svn: 134905

The 'CS' is not a predication suffix in this case.

llvm-svn: 134903

Print shifted immediate values directly rather than as a payload+shifter
value pair. This makes for more readable output assembly code, simplifies
the instruction printer, and is consistent with how Thumb immediates are
 displayed.

llvm-svn: 134902

llvm-svn: 134893

llvm-svn: 134888

llvm-svn: 134887

  and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884

more than one use.

Fixes PR10322.

llvm-svn: 134883

llvm-svn: 134882

llvm-svn: 134868

llvm-svn: 134858

llvm-svn: 134856

type refinement.  Zap them now that type refinement is toast.

llvm-svn: 134837

llvm-svn: 134836

their names, we don't need a module around to print them.

llvm-svn: 134835

llvm-svn: 134833

llvm-svn: 134832

patch brings numerous advantages to LLVM.  One way to look at it
is through diffstat:
 109 files changed, 3005 insertions(+), 5906 deletions(-)

Removing almost 3K lines of code is a good thing.  Other advantages
include:

1. Value::getType() is a simple load that can be CSE'd, not a mutating
   union-find operation.
2. Types a uniqued and never move once created, defining away PATypeHolder.
3. Structs can be "named" now, and their name is part of the identity that
   uniques them.  This means that the compiler doesn't merge them structurally
   which makes the IR much less confusing.
4. Now that there is no way to get a cycle in a type graph without a named
   struct type, "upreferences" go away.
5. Type refinement is completely gone, which should make LTO much MUCH faster
   in some common cases with C++ code.
6. Types are now generally immutable, so we can use "Type *" instead 
   "const Type *" everywhere.

Downsides of this patch are that it removes some functions from the C API,
so people using those will have to upgrade to (not yet added) new API.  
"LLVM 3.0" is the right time to do this.

There are still some cleanups pending after this, this patch is large enough
as-is.

llvm-svn: 134829

llvm-svn: 134812

llvm-svn: 134800

CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.

llvm-svn: 134795

Spills should be hoisted out of loops, but we don't want to hoist them
to dominating blocks at the same loop depth. That could cause the spills
to be executed more often.

llvm-svn: 134782

Added recognition for signed add/sub/mul with overflow intrinsics to GVN as per Chris and Frits suggestion.

llvm-svn: 134777

Try to move spills as early as possible in their basic block. This can
help eliminate interferences by shortening the live range being
spilled.

This fixes PR10221.

llvm-svn: 134776

Really force on 64bit for 64-bit targets.  Should fix remaining failures on unknown x86/non-x86 targets.

llvm-svn: 134773

Revert earlier unnecessary hack.  Make sure we correctly force on 64bit and cmov for 64-bit targets.

llvm-svn: 134768

llvm-svn: 134764

llvm-svn: 134763

llvm-svn: 134760

llvm-svn: 134759

llvm-svn: 134758

llvm-svn: 134757

llvm-svn: 134755

Default 64-bit target features and SSE2 on when a triple specifies x86-64.  Clean up all the other hacks which are now unnecessary.

llvm-svn: 134753

According to Intel Application Note 485, this value is used for
"Intel Core i7 and Intel Xeon processor".  Just include it with the other
"corei7-avx" entries.

llvm-svn: 134750

This tightens up checking for overflow in alloca sizes, based on feedback
from Duncan and John about the change in r132926.

llvm-svn: 134749

The normal tBX instruction is predicable, so there's no reason the
pseudos for using it as a return shouldn't be. Gives us some nice code-gen
improvements as can be seen by the test changes. In particular, several
tests now have to disable if-conversion because it works too well and defeats
the test.

llvm-svn: 134746