When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.

This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.

This is currently controlled by -split-intervals-at-bb.

llvm-svn: 44198

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

llvm-svn: 43644

- Remove a bogus assertion.

llvm-svn: 43211

Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.

llvm-svn: 43192

Turn this:
movswl  %ax, %eax
movl    %eax, -36(%ebp)
xorl    %edi, -36(%ebp)
into
movswl  %ax, %eax
xorl    %edi, %eax
movl    %eax, -36(%ebp)
by unfolding the load / store xorl into an xorl and a store when we know the
value in the spill slot is available in a register. This doesn't change the
number of instructions but reduce the number of times memory is accessed.

Also unfold some load folding instructions and reuse the value when similar
situation presents itself.

llvm-svn: 42947

(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899

Tested with "make check"!

llvm-svn: 42346

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

Add instruction dump output.  This helps find bugs.

llvm-svn: 41744

If the source of a move is in spill slot, the reload may be folded to essentially a load from stack slot. It's ok to mark the stack slot value as available for reuse. But it should not be clobbered since the destination of the move is live.

llvm-svn: 41109

- If the defs of a spilled rematerializable MI are dead after the spill store is deleted, delete
  the def MI as well.

llvm-svn: 41086

If a MI's def is remat as well as spilled, and the store is later deemed dead, mark the def operand as isDead.

llvm-svn: 41083

no more uses within the MBB and the spilled value isn't live out of the MBB.
Then it's safe to delete the spill store.

llvm-svn: 41069

spilled value is available for reuse.

llvm-svn: 41067

Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized.

llvm-svn: 41060

llvm-svn: 39748

llvm-svn: 38534

llvm-svn: 38525

with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644

implementation for x86.

llvm-svn: 37576

llvm-svn: 36483

llvm-svn: 36452

llvm-svn: 35660

register more than once.

llvm-svn: 35513

TID->numOperands.

llvm-svn: 35375

llvm-svn: 35365

llvm-svn: 35208

llvm-svn: 34878

- Available value use may be deleted (e.g. noop move).

llvm-svn: 34841

llvm-svn: 34839

A restore is promoted to copy (or deleted entirely), remove the kill from the last use of the targetted register.

llvm-svn: 34773

A couple of more places where a register liveness has been extended and its last kill should be updated accordingly.

llvm-svn: 34597

llvm-svn: 34536

A spill kills the register being stored. But it is later being reused by spiller, its live range has to be extended.

llvm-svn: 34517

llvm-svn: 34460

llvm-svn: 34435

The code sequence before the spiller is something like:
                 = tMOVrr
        %reg1117 = tMOVrr
        %reg1078 = tLSLri %reg1117, 2

The it starts spilling:
        %r0 = tRestore <fi#5>, 0
        %r1 = tRestore <fi#7>, 0
        %r1 = tMOVrr %r1<kill>
        tSpill %r1, <fi#5>, 0
        %reg1078 = tLSLri %reg1117, 2

It restores the value while processing the first tMOVrr. At this point, the
spiller remembers fi#5 is available in %r0. Next it processes the second move.
It restores the source before the move and spills the result afterwards. The
move becomes a noop and is deleted. However, a spill has been inserted and that
should invalidate reuse of %r0 for fi#5 and add reuse of %r1 for fi#5.
Therefore, %reg1117 (which is also assigned fi#5) should get %r1, not %r0.

llvm-svn: 34039

llvm-svn: 33457

GetRegForReload() now keeps track which registers have been considered and rejected during its quest to find a suitable reload register. This avoids an infinite loop in case like this:
  t1 := op t2, t3
  t2 <- assigned r0 for use by the reload but ended up reuse r1
  t3 <- assigned r1 for use by the reload but ended up reuse r0
  t1 <- desires r1
        sees r1 is taken by t2, tries t2's reload register r0
        sees r0 is taken by t3, tries t3's reload register r1
        sees r1 is taken by t2, tries t2's reload register r0 ...

llvm-svn: 33382