common transformations. This includes updating repairIntervalsInRange() to
handle more cases.

llvm-svn: 175604

correct value is needed in every iteration of the loop for updating
LiveIntervals.

llvm-svn: 175603

and removing instructions. The implementation seems more complicated than it
needs to be, but I couldn't find something simpler that dealt with all of the
corner cases.

Also add a call to repairIndexesInRange() from repairIntervalsInRange().

llvm-svn: 175601

after the two-address pass. The remaining problems in 'make check' are occurring
later.

llvm-svn: 175598

llvm-svn: 175597

llvm-svn: 175596

  SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16
$T8 shows up as register $24 when emitted from C++ code so we had
to change some tests that were already there for this functionality.

llvm-svn: 175593

llvm-svn: 175583

llvm-svn: 175581

require call cpp file anyway, so we wouldn't gain anything by keeping them
inline.

llvm-svn: 175579

llvm-svn: 175578

Add the function attributes from an inline asm call. These don't have declarations that set the attribute groups, so we must do it on our own.

llvm-svn: 175577

MS-style inline assembly.

This is a follow-on to r175334.  Forcing a FP to be emitted doesn't ensure it
will be used.  Therefore, force the base pointer as well.  We now treat MS
inline assembly in the same way we treat functions with dynamic stack
realignment and VLAs.  This guarantees the BP will be used to reference 
parameters and locals.
rdar://13218191

llvm-svn: 175576

which uses it. This is not ideal, but it ought to at least restore the
behavior to what it was before.

llvm-svn: 175571

excluding visibility bits.

Mips (o32 abi) specific e_header setting.

EF_MIPS_ABI_O32 needs to be set in the 
ELF header flags for o32 abi output.

Contributer: Reed Kotler
llvm-svn: 175569

llvm-svn: 175568

llvm-svn: 175567

excluding visibility bits.

Mips (Mips16) specific e_header setting.

EF_MIPS_ARCH_ASE_M16 needs to be set in the 
ELF header flags for Mips16.

Contributer: Reed Kotler
llvm-svn: 175566

llvm-svn: 175565

excluding visibility bits.

Mips (MicroMips) specific STO handling .

The st_other field settig for STO_MIPS_MICROMIPS

Contributer: Zoran Jovanovic
llvm-svn: 175564

llvm-svn: 175562

excluding visibility bits.

Generic STO handling at the Target level.

The st_other field of the ELF symbol table is one
byte in size. The first 2 bytes are used for generic
visibility and are currently handled by llvm.

The other six bits are processor specific and need 
to be set at the target level.

A couple of notes:

The new static methods for accessing and setting the "other"
flags in include/llvm/MC/MCELF.h match the style guide
and not the other methods in the file. I don't like the
inconsistency, but feel I should follow the prescribed 
lowerUpper() convention.

STO_ value definitions are not specified in gnu land as 
consistently as the STT_ and STB_ fields. Probably because
the latter were defined in a standards doc and the former
defined partially in code. I have stuck with the full byte
definition of the flags.

Contributer: Zoran Jovanovic
llvm-svn: 175561

llvm-svn: 175560

In my previous commit:
"Merge a f32 bitcast of a v2i32 extractelt

A vectorized sitfp on doubles will get scalarized to a sequence of an
extract_element of <2 x i32>, a bitcast to f32 and a sitofp.
Due to the the extract_element, and the bitcast we will uneccessarily generate
moves between scalar and vector registers."

I added a pattern containing a copy_to_regclass. The copy_to_regclass is
actually not needed.

radar://13191881

llvm-svn: 175555

Fix a bug in mayHaveSideEffects. Functions that do not return are now considered as instructions with side effects. 

rdar://13227456

llvm-svn: 175553

llvm-svn: 175550

character devices.

llvm-svn: 175549

/dev/stdin as an input when stdin is connected to a tty, for example.

No test, because it's difficult to write a reasonably portable test
for this. /dev/stdin isn't a character device when stdin is redirected
from a file or connected to a pipe.

llvm-svn: 175542

When creating an allocation hint for a register pair, make sure the hint
for the physical register reference is still in the allocation order.

rdar://13240556

llvm-svn: 175541

Target implementations of getRegAllocationHints() should use the
provided allocation order, and they can never return hints outside the
order. This is already documented in TargetRegisterInfo.h.

<rdar://problem/13240556>

llvm-svn: 175540

HexagonInstrFormats.td.

llvm-svn: 175537

No intended functionality change.

llvm-svn: 175536

PPCJITInfo.cpp in r175394.

llvm-svn: 175531

Due to the execution order of doFinalization functions, the GC information were
deleted before AsmPrinter::doFinalization was executed. Thus, the
GCMetadataPrinter::finishAssembly was never called.

The patch fixes that by moving the code of the GCInfoDeleter::doFinalization to
Printer::doFinalization.

llvm-svn: 175528

llvm-svn: 175527

llvm-svn: 175525

A vectorized sitfp on doubles will get scalarized to a sequence of an
extract_element of <2 x i32>, a bitcast to f32 and a sitofp.
Due to the the extract_element, and the bitcast we will uneccessarily generate
moves between scalar and vector registers.

The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract
the element from the vector instead.

radar://13191881

llvm-svn: 175520

NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175519

This stops the Machine Verifier from complaining about uses of undefined
physical registers.

NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175518

Kernel function arguments are lowered to loads from the PARAM_I address
space.  When creating these load instructions, we were initializing
their MachinePointerInfo with an Arguement object that was not attached
to any function.  This was causing the MachineScheduler to crash when
it tried to access the parent of the Arguement.

This has been fixed by initializing the MachinePointerInfo with a
UndefValue instead.

NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175517