llvm-svn: 197696

llvm-svn: 197692

llvm-svn: 197685

1. The arch directive now appears before the cpu directive
2. Long run lines were split across multiple lines
    
No functional changes.

llvm-svn: 197588

   
No functional changes.

llvm-svn: 197559

The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed
immediate.

llvm-svn: 197506

branch instructions for mips and micromips instruction sets thus avoiding
the situation of generating branches to undesired locations if offsets
cannot be encoded.

This patch also checks if a fixup cannot be applied and returns a fatal error
if that's the case.

llvm-svn: 197223

Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

llvm-svn: 196773

not being correctly encoded/decoded.
In more detail, immediate fields of LD/ST instructions should be
divided/multiplied by the size of the data format before encoding and
after decoding, respectively.

llvm-svn: 196494

llvm-svn: 195976

llvm-svn: 195967

llvm-svn: 195965

llvm-svn: 195152

No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.

llvm-svn: 195067

Note that there's no hardware yet that relies on that encoding.

llvm-svn: 195006

    
The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field.

llvm-svn: 195004

llvm-svn: 194792

llvm-svn: 194570

llvm-svn: 194569

This patch fixes a bug in floating point operands parsing, when instruction alias uses default register operand.

llvm-svn: 194562

llvm-svn: 194258

The encoding was updated in MSA r1.07.

llvm-svn: 194255

Implement gpword directive for mips, test case added. Stype changes using clang-format are also included.

llvm-svn: 194145

llvm-svn: 193992

llvm-svn: 193623

llvm-svn: 193332

llvm-svn: 193240

These branches have a 16-bit offset (R_MIPS_PC16).

List of conditional branch instructions:
bnz.{b,h,w,d}
bnz.v
bz.{b,h,w,d}
bz.v

llvm-svn: 193157

llvm-svn: 193082

llvm-svn: 193081

llvm-svn: 193080

These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon 
as GAS starts accepting them by name as that would make the assembly easier to read.

llvm-svn: 193078

llvm-svn: 193077

The second parameter of the SLD intrinsic is the number of columns (GPR) to 
slide left the source array.

llvm-svn: 193076

llvm-svn: 192661

List of instructions:
bclri.{b,h,w,d}
binsli.{b,h,w,d}
binsri.{b,h,w,d}
bnegi.{b,h,w,d}
bseti.{b,h,w,d}
sat_s.{b,h,w,d}
sat_u.{b,h,w,d}
slli.{b,h,w,d}
srai.{b,h,w,d}
srari.{b,h,w,d}
srli.{b,h,w,d}
srlri.{b,h,w,d}

llvm-svn: 192589

List of instructions:
and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v.

llvm-svn: 192588

llvm-svn: 192587

List of instructions:
copy_s.{b,h,w}
copy_u.{b,h,w}
sldi.{b,h,w,d}
splati.{b,h,w,d}

llvm-svn: 192586

INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.

llvm-svn: 192582