llvm-svn: 180889

llvm-svn: 180885

PredicateInstruction function.

llvm-svn: 180884

The old jit always uses DW_EH_PE_absptr, but MCJIT can use other encodings.
This is in preparation for adding EH support to MCJIT, but not directly
related, so I am committing it first.

llvm-svn: 180883

llvm-svn: 180882

the things, and renames it to CBindingWrapping.h.  I also moved 
CBindingWrapping.h into Support/.

This new file just contains the macros for defining different wrap/unwrap 
methods.

The calls to those macros, as well as any custom wrap/unwrap definitions 
(like for array of Values for example), are put into corresponding C++ 
headers.

Doing this required some #include surgery, since some .cpp files relied 
on the fact that including Wrap.h implicitly caused the inclusion of a 
bunch of other things.

This also now means that the C++ headers will include their corresponding 
C API headers; for example Value.h must include llvm-c/Core.h.  I think 
this is harmless, since the C API headers contain just external function 
declarations and some C types, so I don't believe there should be any 
nasty dependency issues here.

llvm-svn: 180881

SROA: Generate selects instead of shuffles when blending values because this is the cannonical form.
Shuffles are more difficult to lower and we usually don't touch them, while we do optimize selects more often.

llvm-svn: 180875

report a fatal error.  This allows us to continue processing the translation
unit.  Test case to come on the clang side because we need an inline asm
diagnostics handler in place.
rdar://13446483

llvm-svn: 180873

Optimize CONCAT_VECTOR nodes that merge EXTRACT_SUBVECTOR values that extract from the same vector.

rdar://13402653
PR15866

llvm-svn: 180871

Updating the getting started guide for Visual Studio users. Specifically, pointing out that you have to pass additional parameters to llvm-lit and explicitly specify python on the command line.

llvm-svn: 180869

warning C4946: reinterpret_cast used between related classes

llvm-svn: 180852

warning C4800: forcing value to bool 'true' or 'false' (performance warning)

llvm-svn: 180851

replace reinterpret_cast by cast or remove reinterpret_cast to get rid of windows warning: warning C4946: reinterpret_cast used between related classes.

llvm-svn: 180850

warning C4244: 'argument' : conversion from 'uint64_t' to 'const unsigned int', possible loss of data

llvm-svn: 180847

warning C4244: 'argument' : conversion from 'uint64_t' to 'const unsigned int', possible loss of data

llvm-svn: 180846

The cause of the windows failures was fixed by r180791. Revert to the state
after Sabre's original revert.

Original message:

revert r179735, it has no testcases, and doesn't really make sense.

llvm-svn: 180844

llvm-svn: 180843

Patch by Joshua Magee.

llvm-svn: 180842

ArrayRef.

llvm-svn: 180840

llvm-svn: 180839

llvm-svn: 180838

llvm-svn: 180837

Fixes a buffer overrun where the allocated buffer wasn't large enough to accommodate the closing quote escape rules in some instances.

llvm-svn: 180836

This reverts commit r180802

There's ongoing discussion about whether this is the right place to make
this transformation. Reverting for now while we figure it out.

llvm-svn: 180834

Expand copy instructions between two accumulator registers before callee-saved
scan is done. Handle copies between integer GPR and hi/lo registers in
MipsSEInstrInfo::copyPhysReg. Delete pseudo-copy instructions that are not
needed.

llvm-svn: 180827

Only pass 'returned' to target-specific lowering code when the value of entire register is guaranteed to be preserved.

llvm-svn: 180825

prevent this, capture the location before RI is freed.

llvm-svn: 180824

instructions.

llvm-svn: 180820

because it breaks some buildbots.

This reverts commit 180816.

llvm-svn: 180819

register-indirect address with an offset of 0.
It used to be that a DBG_VALUE is a register-indirect value if the offset
(operand 1) is nonzero. The new convention is that a DBG_VALUE is
register-indirect if the first operand is a register and the second
operand is an immediate. For plain registers use the combination reg, reg.

rdar://problem/13658587

llvm-svn: 180816

I'll fix the heuristic in a general way in a follow-up commit.

llvm-svn: 180815

No intended functionality changes.

llvm-svn: 180807

llvm-svn: 180806

llvm-svn: 180805

Patch by Zoran Jovanovic.

llvm-svn: 180804

Always fold a shuffle-of-shuffle into a single shuffle when there's only one
input vector in the first place. Continue to be more conservative when there's
multiple inputs.

rdar://13402653
PR15866

llvm-svn: 180802

llvm-svn: 180801

First, taking advantage of the fact that the virtual base registers are allocated in order of the local frame offsets, remove the quadratic register-searching behavior. Because of the ordering, we only need to check the last virtual base register created.

Second, store the frame index in the FrameRef structure, and get the frame index and the local offset from this structure at the top of the loop iteration. This allows us to de-nest the loops in insertFrameReferenceRegisters (and I think makes the code cleaner). I also moved the needsFrameBaseReg check into the first loop over instructions so that we don't bother pushing FrameRefs for instructions that don't want a virtual base register anyway.

Lastly, and this is the only functionality change, avoid the creation of single-use virtual base registers. These are currently not useful because, in general, they end up replacing what would be one r+r instruction with an add and a r+i instruction. Committing this removes the XFAIL in CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll

Jim has okayed this off-list.

llvm-svn: 180799

Patch by Oliver Pinter.

llvm-svn: 180797

This will make it easier to turn on struct-path aware TBAA since the metadata
format will change.

llvm-svn: 180796