There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode.

llvm-svn: 135629

Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't.

llvm-svn: 135628

While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value.

llvm-svn: 135627

Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.

llvm-svn: 135626

llvm-svn: 135625

Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename
them to be a bit more descriptive that they're for the PKH instructions.

llvm-svn: 135617

The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't
be also encoded as part of the shift value immediate. Otherwise we're able to
represent invalid instructions, plus it needlessly complicates the
representation. Preparatory work for asm parsing of these instructions.

llvm-svn: 135616

llvm-svn: 135613

There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.

llvm-svn: 135611

llvm-svn: 135607

Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.

llvm-svn: 135596

llvm-svn: 135595

This should fix the spurious buildbot errors.

llvm-svn: 135594

llvm-svn: 135581

- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580

llvm-svn: 135575

llvm-svn: 135573

TargetLoweringObjectFileImpl down to MCObjectFileInfo.

TargetAsmInfo is done to one last method. It's *almost* gone!

llvm-svn: 135569

llvm-svn: 135568

info. Holding Use* pointers is bad form even though it happened to
work in this case.

llvm-svn: 135566

X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin.

llvm-svn: 135564

llvm-svn: 135561

llvm-svn: 135558

llvm-svn: 135555

llvm-svn: 135550

llvm-svn: 135546

llvm-svn: 135537

llvm-svn: 135535

llvm-svn: 135534

The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.

llvm-svn: 135532

llvm-svn: 135528

Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.

llvm-svn: 135527

llvm-svn: 135524

llvm-svn: 135522

Add range checking to the immediate operands. Update tests accordingly.

llvm-svn: 135521

ANDi, when the instruction does not have any immediate operands.

llvm-svn: 135520

llvm-svn: 135514

Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.

llvm-svn: 135513

llvm-svn: 135507

Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.

llvm-svn: 135506