Enable double to float shrinking optimizations for binary functions like 'fmin/fmax'. Fix radar:15283121

llvm-svn: 197434

Outputs branch information for unconditional branches in addition to
conditional branches. -b option must be enabled.

Also updated tests.

llvm-svn: 197432

This allows the WebKit_JS calling convention to perform partial writes on a 4
byte granularity to stack slots.

llvm-svn: 197431

llvm-svn: 197426

SI_KIL -> SI_KILL

llvm-svn: 197425

Revert "Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies."

This reverts commit r197414.

It broke the ppc64 bootstrap. I will post a testcase in a sec.

llvm-svn: 197424

llvm-svn: 197418

Pass the first integer argument (callee) in register to optimize inline caches.

llvm-svn: 197416

that it coalesces normal copies.

Without this, MachineCSE is powerless to handle redundant operations
with truncated source operands.

This required fixing the 2-addr pass to handle tied subregisters. It
isn't clear what combinations of subregisters can legally be tied, but
the simple case of truncated source operands is now safely handled:

     %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1
     %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2
     %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def>

llvm-svn: 197414

llvm-svn: 197413

Produce them in the same order on every target. The order is that of
getStringRepresentation: e|E-i*-f*-v*-a*-s*-n*-S*.

llvm-svn: 197411

While there, simplify "p3:32:32:32" to "p3:32:32".

llvm-svn: 197407

llvm-svn: 197405

llvm-svn: 197402

This was manifesting as an LLVM_ASSUME_ALIGNED() failure in an ELF debug
info test when building LLVM with clang in the Microsoft C++ ABI.

llvm-svn: 197401

llvm-svn: 197400

llvm-svn: 197398

llvm-svn: 197397

llvm-svn: 197396

[CMake] Introduce LLVM_RUNTIME_OUTPUT_INTDIR and LLVM_LIBRARY_OUTPUT_INTDIR to reduce references to CMAKE_CFG_INTDIR.

Each of them forms like;
  ${CMAKE_BINARY_DIR}/bin/${CMAKE_CFG_INTDIR}
  ${CMAKE_BINARY_DIR}/lib/${CMAKE_CFG_INTDIR}

llvm-svn: 197394

PowerPC now has an asm parser (and has for many months now); indicate this in
PowerPC/LLVMBuild.txt.

llvm-svn: 197393

llvm-svn: 197392

llvm-svn: 197387

llvm-svn: 197385

Added scalar compare VCMPSS, VCMPSD.
Implemented LowerSELECT for scalar FP operations.
I replaced FSETCCss, FSETCCsd with one node type FSETCCs.
Node extract_vector_elt(v16i1/v8i1, idx) returns an element of type i1.

llvm-svn: 197384

llvm-config: Fixup r197380, tweak for cross compilation. SYSTEM_LIBS should be --host's in BuildTools/llvm-config.

FIXME: Host's llvm-config is not generated. It's for target's.
Host tools, aka "BuildTools", in utils, do not require llvm-config to build.

For example with --host=i686-pc-mingw32 --build=linux,

  $ BuildTools/Release+Asserts/bin/llvm-config --libs support
  -lLLVMSupport
  -lpthread -lshell32 -lpsapi -limagehlp -lm

llvm-svn: 197382

LLVM libs are printed in the first line, and system libs are printed in the next line.

  $ bin/llvm-config --libs object
  -lLLVMObject -lLLVMSupport
  -lrt -ldl -ltinfo -lpthread -lz

It is workaround for PR3347 and PR8449.

llvm-svn: 197380

llvm-svn: 197366

Currently we have such types as legal vector types. The DAG combiner may generate some DAG nodes having such types but we don't have patterns to match them.
E.g. a load i32 and a bitcast i32 to v1i32 will be combined into a load v1i32:
     bitcast (load i32) to v1i32 -> load v1i32.
So this patch fixes such problems for load/dup instructions.
If v1i8/v1i16/v1i32 are not legal any more, the code in this patch can be deleted. So I also add some FIXME.

llvm-svn: 197361

that follows).

llvm-svn: 197358

llvm-svn: 197357

part of a multi-line pseudo which worked around a linker bug for mips16.

llvm-svn: 197356

Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series. 

llvm-svn: 197350

llvm-svn: 197348

llvm-svn: 197340

llvm-svn: 197335

llvm-svn: 197332

llvm-svn: 197329

llvm-svn: 197327

This is a base implementation of the powerpc-apple-darwin asm parser dialect.

* Enables infrastructure (essentially isDarwin()) and fixes up the parsing of asm directives to separate out ELF and MachO/Darwin additions.
* Enables parsing of {r,f,v}XX as register identifiers.
* Enables parsing of lo16() hi16() and ha16() as modifiers.

The changes to the test case are from David Fang (fangism).

llvm-svn: 197324