Commits · 923b47e89defeaa007ba660f5626264889ecd1b2 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Jul 16, 2009
- Register FP regclasses · 923b47e8
  Anton Korobeynikov authored Jul 16, 2009
  923b47e8
- Add FP regs · 5509b58c
  Anton Korobeynikov authored Jul 16, 2009
  5509b58c
- Fix fallout from prev. patch · 570d0c36
  Anton Korobeynikov authored Jul 16, 2009
  570d0c36
- Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems · b25949b0
  Anton Korobeynikov authored Jul 16, 2009
  b25949b0
- Use divide single for 32 bit signed divides · e5b04d71
  Anton Korobeynikov authored Jul 16, 2009
  e5b04d71
- Add missed operands types · 2799032a
  Anton Korobeynikov authored Jul 16, 2009
  2799032a
- Missed part of prev. patch · 5fd5c3ef
  Anton Korobeynikov authored Jul 16, 2009
  5fd5c3ef
- Another attempt to fix prologue emission · b950f196
  Anton Korobeynikov authored Jul 16, 2009
  b950f196
- Implement 'large' PIC model · 091872cb
  Anton Korobeynikov authored Jul 16, 2009
  091872cb
- Implement shifts properly (hopefilly - finally!) · 569a94c4
  Anton Korobeynikov authored Jul 16, 2009
  569a94c4
- Remove redundand register move · e0ad108f
  Anton Korobeynikov authored Jul 16, 2009
  e0ad108f
- Properly handle divides. As a bonus - implement memory versions of them. · fe8df8ff
  Anton Korobeynikov authored Jul 16, 2009
  fe8df8ff
- Fix epic fail: full-width muls are not commutable. This unbreaks bunch of... · 68b101a0
  Anton Korobeynikov authored Jul 16, 2009
  68b101a0
- 32 bit rotate is not twoaddr instruction · 1de42953
  Anton Korobeynikov authored Jul 16, 2009
  1de42953
- 32 bit shifts have only 12 bit displacements · 34ad780d
  Anton Korobeynikov authored Jul 16, 2009
  34ad780d
- Add proper register aliases · 6759661c
  Anton Korobeynikov authored Jul 16, 2009
  6759661c
- Properly generate stack frame · a3157b1c
  Anton Korobeynikov authored Jul 16, 2009
  a3157b1c
- Unbreak indirect branches · 6f3d11cf
  Anton Korobeynikov authored Jul 16, 2009
  6f3d11cf
- Unbreak · 2300eaa8
  Anton Korobeynikov authored Jul 16, 2009
  2300eaa8
- Do not forget to save R15 when we allocate stack frame · 20237e50
  Anton Korobeynikov authored Jul 16, 2009
  20237e50
- All calls clobbers R14 · 427dce86
  Anton Korobeynikov authored Jul 16, 2009
  427dce86
- Unbreak calls to vararg functions · 2e574c15
  Anton Korobeynikov authored Jul 16, 2009
  2e574c15
- Stupid typo · 466f2e4b
  Anton Korobeynikov authored Jul 16, 2009
  466f2e4b
- Typos · d8458e6c
  Anton Korobeynikov authored Jul 16, 2009
  d8458e6c
- Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. · 1eb6262b
  Anton Korobeynikov authored Jul 16, 2009
  1eb6262b
- Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are... · 3db62831
  Anton Korobeynikov authored Jul 16, 2009
  3db62831
- Add support for 12 bit displacements · 62f8515b
  Anton Korobeynikov authored Jul 16, 2009
  62f8515b
- We already have reserved call frame regardless whether variable sized frame... · 432d4cd9
  Anton Korobeynikov authored Jul 16, 2009
  432d4cd9
- Emit proper lowering of load from arg stack slot · 43d33bd6
  Anton Korobeynikov authored Jul 16, 2009
  43d33bd6
- Implement dynamic allocas · a8197bb6
  Anton Korobeynikov authored Jul 16, 2009
  a8197bb6
- Add jump tables · 7193e267
  Anton Korobeynikov authored Jul 16, 2009
  7193e267
- Exapnd br_jt into indirect branch. Provide pattern for indirect branches. · 5dfac244
  Anton Korobeynikov authored Jul 16, 2009
  5dfac244
- Implement 64 bit immediates · d52a95f1
  Anton Korobeynikov authored Jul 16, 2009
  d52a95f1
- Add rotates · 2ff298fa
  Anton Korobeynikov authored Jul 16, 2009
  2ff298fa
- Add patterns for integer negate · 9362d9aa
  Anton Korobeynikov authored Jul 16, 2009
  9362d9aa
- Provide proper patterns for and with imm instructions. Tune the tests accordingly. · f07c7941
  Anton Korobeynikov authored Jul 16, 2009
  f07c7941
- Add 32 bit and reg-imm and disable invalid patterns for now · 59049d91
  Anton Korobeynikov authored Jul 16, 2009
  59049d91
- Add z9 and z10 target processors. Mark z10-only instructions as such. · 2d218394
  Anton Korobeynikov authored Jul 16, 2009
  2d218394
- Fix MUL64rm instruction asmprinting · 68b8486f
  Anton Korobeynikov authored Jul 16, 2009
  68b8486f
- Preliminary asmprinting of globals · edba6f3a
  Anton Korobeynikov authored Jul 16, 2009
  edba6f3a