llvm-svn: 30763

It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined.

llvm-svn: 30762

llvm-svn: 30759

llvm-svn: 30748

llvm-svn: 30742

llvm-svn: 30737

llvm-svn: 30723

llvm-svn: 30722

CodeGen/X86/scalar_sse_minmax.ll

llvm-svn: 30719

llvm-svn: 30717

extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714

llvm-svn: 30703

llvm-svn: 30694

llvm-svn: 30674

llvm-svn: 30663

llvm-svn: 30631

llvm-svn: 30608

int x __attribute__((used));

to:

        .data
.comm _x,4              ; 'x'
        .no_dead_strip  _x

on both x86 and ppc darwin targets.

llvm-svn: 30605

llvm-svn: 30583

llvm-svn: 30559

llvm-svn: 30556

llvm-svn: 30553

llvm-svn: 30549

llvm-svn: 30515

llvm-svn: 30457

Added X86 StdCall & FastCall calling conventions. Codegen will follow.

llvm-svn: 30446

llvm-svn: 30441

llvm-svn: 30406

llvm-svn: 30382

DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.

llvm-svn: 30374

llvm-svn: 30308

llvm-svn: 30300

llvm-svn: 30294

llvm-svn: 30293

We now compile CodeGen/X86/lea-2.ll into:

_test:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        leal -5(%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        leal (,%eax,4), %eax
        addl 8(%esp), %eax
        addl $4294967291, %eax
        ret

llvm-svn: 30288

llvm-svn: 30286

llvm-svn: 30285

This implements CodeGen/X86/jump_sign.ll.

llvm-svn: 30283

llvm-svn: 30279

llvm-svn: 30271