llvm-svn: 113671

llvm-svn: 113670

llvm-svn: 113666

the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.

llvm-svn: 113665

llvm-svn: 113662

llvm-svn: 113659

llvm-svn: 113654

llvm-svn: 113653

used for fast-isel.

llvm-svn: 113652

Reassociate does this but it doesn't catch all cases (e.g. if the operands are i1).

llvm-svn: 113651

llvm-svn: 113647

llvm-svn: 113643

iterator when an optimization took place. This allows us to do more insane
things with the code than just remove an instruction or two.

llvm-svn: 113640

llvm-svn: 113637

llvm-svn: 113632

(The Ada bindings probably need it too, but all the
obvious places to change say "do not edit this file".)

llvm-svn: 113618

string.

llvm-svn: 113615

llvm-svn: 113614

llvm-svn: 113610

llvm-svn: 113608

understand (the log file was no help).

llvm-svn: 113605

llvm-svn: 113603

"llvm.eh.catch.all.value". Only the name needs to be changed.

llvm-svn: 113600

fixed operands from the total number of operands (including the variadic ones).

llvm-svn: 113597

Lower the unrolling theshold to 150.  Empirical tests indicate that this is a sweet spot in the performance per
code size increase curve.

llvm-svn: 113595

llvm-svn: 113594

reserved regs and that register allocators need to explicitly check for
them.

llvm-svn: 113593

that the memoperands are properly set after DAG building and general mucking
about.

llvm-svn: 113585

llvm-svn: 113584

only when ENABLE_SHARED=1.

Loadable module for Win32 requires all symbols resolved for linking.

llvm-svn: 113579

Building archive would be executed due to definition of BUILD_ARCHIVE,
even if BUILD_ARCHIVE = "0".

llvm-svn: 113578

llvm-svn: 113577

to use AddrMode4, there was a count of the registers stored in one of the
operands.  I changed that to just count the operands but forgot to adjust for
the size of D registers.  This was noticed by Evan as a performance problem
but it is a potential correctness bug as well, since it is possible that this
could merge a base update with a non-matching immediate.

llvm-svn: 113576

take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.

llvm-svn: 113570

llvm-svn: 113566

more clear.  No functional change.

llvm-svn: 113565

bad as I'd thought.

llvm-svn: 113561

is different from what the code now uses in a two ways: NamedMDNodes
were considered Values and included in the numbering, and the
function-local metadata counter wasn't reset between functions.

The later problem breaks lazy deserialization, so instead of trying
to emulate the old numbering, just drop the old metadata. The only
in-tree use case is debug info with LTO, where the QOI loss is
considered acceptable.

llvm-svn: 113557

 - This is annoying, because we have to scatter this check everywhere that could emit real data, but I see no better solution.

llvm-svn: 113552

llvm-svn: 113551