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  1. Jul 19, 2007
    • Evan Cheng's avatar
      Change instruction description to split OperandList into OutOperandList and · 94b5a80b
      Evan Cheng authored
      InOperandList. This gives one piece of important information: # of results
      produced by an instruction.
      An example of the change:
      def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                       "add{l} {$src2, $dst|$dst, $src2}",
                       [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
      =>
      def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                       "add{l} {$src2, $dst|$dst, $src2}",
                       [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
      
      llvm-svn: 40033
      94b5a80b
  2. Jul 10, 2007
  3. Jul 07, 2007
  4. Jul 06, 2007
  5. Jul 05, 2007
    • Evan Cheng's avatar
      - Added zero_reg def to stand for register 0. · 756d15ac
      Evan Cheng authored
      - Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.
      
      llvm-svn: 37892
      756d15ac
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