Atomic op support.  If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet

llvm-svn: 47430

llvm-svn: 47429

Eli Friedman.  This implements CodeGen/Generic/2008-02-20-MatchingMem.ll.

llvm-svn: 47428

llvm-svn: 47427

inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.

llvm-svn: 47426

llvm-svn: 47425

Now, we have very first multiple return value testcase!

llvm-svn: 47424

llvm-svn: 47423

llvm-svn: 47422

llvm-svn: 47421

example, we can now correctly build the type for things like:
    _AS1 float * _AS2 *B;

llvm-svn: 47420

llvm-svn: 47419

llvm-svn: 47418

allows us to correctly handle stuff like:

  _AS1 float *B;

and to reject stuff like:

  _AS1 _AS2* x;

llvm-svn: 47417

llvm-svn: 47416

llvm-svn: 47415

llvm-svn: 47414

llvm-svn: 47413

llvm-svn: 47412

llvm-svn: 47411

llvm-svn: 47410

llvm-svn: 47409

llvm-svn: 47408

	ret i32 1, i8 2
another step towards multiple return value support.

llvm-svn: 47407

One small step towards multiple return value support.

llvm-svn: 47406

declspec, it is currently nonfunctional though.

llvm-svn: 47405

returning directly.  This allows us to factor handling of _Complex.

llvm-svn: 47404

llvm-svn: 47402

llvm-svn: 47401

llvm-svn: 47400

No need to go up more levels. A def of a register also sets its sub-registers
(so if PhysRegInfo[SuperReg] is NULL, it means SuperReg's super registers are
not previously defined).

llvm-svn: 47399

rename QualType::getQualifiers to getCVRQualifiers.
Add some fixme's and clean up some code relevant to qualifiers.
Change ASQualType to contain a Type* instead of a QualType.  
Any CVR qualifiers should be on the outer qual type.

llvm-svn: 47398

llvm-svn: 47397

llvm-svn: 47396

llvm-svn: 47395

llvm-svn: 47394

consistency.

llvm-svn: 47393

llvm-svn: 47392

llvm-svn: 47391

llvm-svn: 47390