1. If we are two-addressing a commutable instruction and the LHS is not the
   last use of the variable, see if the instruction is the last use of the
   RHS.  If so, commute the instruction, allowing us to avoid a
   register-register copy in many cases for common instructions like ADD, OR,
   AND, etc on X86.
2. If #1 doesn't hold, and if this is an instruction that also existing in
   3-address form, promote the instruction to a 3-address instruction to
   avoid the register-register copy.  We can do this for several common
   instructions in X86, including ADDrr, INC, DEC, etc.

This patch implements test/Regression/CodeGen/X86/commute-two-addr.ll,
overlap-add.ll, and overlap-shift.ll when I check in the X86 support for it.

llvm-svn: 19245

llvm-svn: 18955

20%, shaving 0.1s off hbd compile time on my g5.  Yay.

llvm-svn: 18592

Make only one print method to avoid overloaded virtual warnings when \
compiled with -Woverloaded-virtual

llvm-svn: 18589

Prolang-C/bison in the JIT

llvm-svn: 18477

PR449

llvm-svn: 18306

llvm-svn: 18131

llvm-svn: 18129

llvm-svn: 18064

llvm-svn: 18034

llvm-svn: 18009

* Do not put fixed registers into the unhandled set.  This means they will
  never find their way into the inactive, active, or handled sets, so we
  can simplify a bunch of code.

llvm-svn: 17945

incrementing i.

llvm-svn: 17944

i->start == j->start, then certainly i->end > j->start.

llvm-svn: 17943

intersecting an interval.

llvm-svn: 17939

llvm-svn: 17938

search physreg intervals every time we access it.  This takes another
half second off of linscan.

llvm-svn: 17937

llvm-svn: 17936

the iterator hints we have to speed up overlaps().  This speeds linscan up
by about .2s (out of 8.7) on 175.vpr for PPC.

llvm-svn: 17935

llvm-svn: 17934

* Eliminate the releaseMemory method, this is not an analysis
* Change the fixed, active, and inactive lists of intervals to maintain an
  iterator for the current position in the interval.  This allows us to do
  constant time increments of the iterator instead of having to do a binary
  search to find our liverange in our liveinterval all of the time, which
  substantially speeds up cases where LiveIntervals have many LiveRanges
  - which is very common for physical registers.  On targets with many
  physregs, this can make a noticable difference.

  With a release build of LLC for PPC, this halves the time in
  processInactiveIntervals and processActiveIntervals, from 1.5s to .75s.

  This also lays the ground for more to come.

llvm-svn: 17933

llvm-svn: 17932

llvm-svn: 17931

iterator/begin/end members.

llvm-svn: 17930

llvm-svn: 17887

llvm-svn: 17483

llvm-svn: 17286

llvm-svn: 17253

Patch contributed by Morten Ofstad

llvm-svn: 17251

llvm-svn: 17238

contributed by Morten Ofstad

llvm-svn: 17217

llvm-svn: 17215

llvm-svn: 17155

llvm-svn: 17136

llvm-svn: 17055

useful when you have a reference like:

int A[100];

void foo() { A[10] = 1; }

In this case, &A[10] is a single constant and should be treated as such.

Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.

This is another fine patch contributed by Jeff Cohen!!

llvm-svn: 17007

The problem occurred when trying to reload this instruction:

MOV32mr %reg2326, 8, %reg2297, 4, %reg2295

The value of reg2326 was available in EBX, so it was reused from there, instead
of reloading it into EDX.

The value of reg2297 was available in EDX, so it was reused from there, instead
of reloading it into EDI.

The value of reg2295 was not available, so we tried reloading it into EBX, its
assigned register.  However, we checked and saw that we already reloaded
something into EBX, so we chose what reg2326 was assigned to (EDX) and reloaded
into that register instead.

Unfortunately EDX had already been used by reg2297, so reloading into EDX
clobbered the value used by the reg2326 operand, breaking the program.

The fix for this is to check that the newly picked register is ok.  In this
case we now find that EDX is already used and try using EDI, which succeeds.

llvm-svn: 17006

llvm-svn: 17005

llvm-svn: 16950

llvm-svn: 16906