- Feb 27, 2007
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Evan Cheng authored
llvm-svn: 34692
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- Feb 23, 2007
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Lauro Ramos Venancio authored
llvm-svn: 34537
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Evan Cheng authored
llvm-svn: 34514
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- Feb 21, 2007
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Jim Laskey authored
llvm-svn: 34482
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- Feb 19, 2007
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Evan Cheng authored
llvm-svn: 34428
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Reid Spencer authored
Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
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- Feb 17, 2007
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Evan Cheng authored
llvm-svn: 34376
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- Feb 07, 2007
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Evan Cheng authored
llvm-svn: 34013
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Evan Cheng authored
llvm-svn: 34011
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Evan Cheng authored
llvm-svn: 34010
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Evan Cheng authored
llvm-svn: 34009
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Evan Cheng authored
that is the case, whenever we use it as a scratch register, save it to R12 first and then restore it after the use. This is a temporary and truly horrible workaround! llvm-svn: 33999
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Evan Cheng authored
- If there is a dynamic alloca, in the epilogue, restore the value of sp using r7 - offset. - Other bug fixes. llvm-svn: 33997
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Evan Cheng authored
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's. llvm-svn: 33975
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Evan Cheng authored
llvm-svn: 33971
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- Feb 06, 2007
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Evan Cheng authored
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers. llvm-svn: 33958
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Evan Cheng authored
llvm-svn: 33945
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- Feb 03, 2007
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Lauro Ramos Venancio authored
llvm-svn: 33800
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- Feb 02, 2007
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Evan Cheng authored
llvm-svn: 33795
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Evan Cheng authored
llvm-svn: 33780
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- Feb 01, 2007
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Evan Cheng authored
llvm-svn: 33741
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Evan Cheng authored
there follows a sp increment for the va register save region. Instead issue a separate pop to another register, increment sp, and then return: pop {r4, r5, r6, r7} pop {r3} add sp, #3 * 4 bx r3 llvm-svn: 33739
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Evan Cheng authored
llvm-svn: 33727
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- Jan 31, 2007
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Evan Cheng authored
llvm-svn: 33724
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Evan Cheng authored
llvm-svn: 33721
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Lauro Ramos Venancio authored
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. llvm-svn: 33703
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Evan Cheng authored
that would require > 3 instructions to materialize), load the immediate from a constpool entry. llvm-svn: 33667
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- Jan 30, 2007
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Evan Cheng authored
sp, imm instructions implicitly multiply the offset by 4. llvm-svn: 33653
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Evan Cheng authored
llvm-svn: 33652
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Evan Cheng authored
spilled (if it is not already). - If LR is spilled, use BL to implement far jumps. LR is not used as a GPR in thumb mode so it can be clobbered if it is properly spilled / restored in prologue / epilogue. - If LR is force spilled but no far jump has been emitted, try undo'ing the spill by: push lr -> delete pop pc -> bx lr llvm-svn: 33650
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- Jan 29, 2007
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Evan Cheng authored
llvm-svn: 33632
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- Jan 26, 2007
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Evan Cheng authored
llvm-svn: 33551
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Evan Cheng authored
llvm-svn: 33509
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- Jan 23, 2007
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Evan Cheng authored
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. llvm-svn: 33460
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Evan Cheng authored
llvm-svn: 33455
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- Jan 20, 2007
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Evan Cheng authored
llvm-svn: 33401
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Evan Cheng authored
llvm-svn: 33390
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Evan Cheng authored
llvm-svn: 33389
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- Jan 19, 2007
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Evan Cheng authored
llvm-svn: 33366
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Evan Cheng authored
llvm-svn: 33353
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