llvm-svn: 56475

llvm-svn: 56474

just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472

default.

llvm-svn: 56471

llvm-svn: 56469

llvm-svn: 56468

llvm-svn: 56467

llvm-svn: 56466

llvm-svn: 56465

llvm-svn: 56464

llvm-svn: 56463

llvm-svn: 56462

llvm-svn: 56461

llvm-svn: 56460

llvm-svn: 56459

llvm-svn: 56458

llvm-svn: 56456

llvm-svn: 56453

(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452

Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.

llvm-svn: 56436

llvm-svn: 56432

add_custom_command with COMMENT. It was forcing unconditional command
execution.

llvm-svn: 56425

llvm-svn: 56419

llvm-svn: 56418

llvm-svn: 56415

sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413

Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412

compute the maximum element directly.

llvm-svn: 56411

correct in the presence of things like EH labels.

llvm-svn: 56410

llvm-svn: 56399

llvm-svn: 56391

Change some class to struct for coherency.

llvm-svn: 56389

Per review feedback.

llvm-svn: 56388

of mayReadFromMemory and mayWriteToMemory.

llvm-svn: 56387

Check bits for preferred register.

llvm-svn: 56384

Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.

llvm-svn: 56381

llvm-svn: 56380

llvm-svn: 56378

llvm-svn: 56377

llvm-svn: 56376