- Jul 14, 2011
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Benjamin Kramer authored
llvm-svn: 135198
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Evan Cheng authored
registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
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Eric Christopher authored
when determining validity of matching constraint. Allow i1 types access to the GR8 reg class for x86. Fixes PR10352 and rdar://9777108 llvm-svn: 135180
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Bruno Cardoso Lopes authored
llvm-svn: 135171
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Nadav Rotem authored
[VECTOR-SELECT] During type legalization we often use the SIGN_EXTEND_INREG SDNode. When this SDNode is legalized during the LegalizeVector phase, it is scalarized because non-simple types are automatically marked to be expanded. In this patch we add support for lowering SIGN_EXTEND_INREG manually. This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements' flag. llvm-svn: 135144
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Eli Friedman authored
Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate. llvm-svn: 135120
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Bill Wendling authored
The frameless unwind stack has a special encoding, the algorithm for which is in "permuteEncode". llvm-svn: 135103
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- Jul 13, 2011
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Bruno Cardoso Lopes authored
general version of X86ISD::ANDNP also opened the room for a little bit of refactoring. llvm-svn: 135088
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Bruno Cardoso Lopes authored
it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN instruction. Rename it. llvm-svn: 135087
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Eli Friedman authored
Make sure we don't combine a large displacement and a frame index in the same addressing mode on x86-64. It can overflow, leading to a crash/miscompile. <rdar://problem/9763308> llvm-svn: 135084
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Eli Friedman authored
Refactor out checking for displacements on x86-64 addressing modes. No functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress. Part of <rdar://problem/9763308>. llvm-svn: 135079
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Jim Grosbach authored
Update the debug output interface for MCParsedAsmOperand to have a print() method which takes an output stream argument, an << operator which invokes the print method using the given stream, and a dump() method which prints the operand to the dbgs() stream. This makes the interface more consistent with the rest of LLVM, and more convenient to use at the debugger command line. llvm-svn: 135043
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Bruno Cardoso Lopes authored
llvm-svn: 135023
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Bill Wendling authored
not the FDE llvm-svn: 135020
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Eli Friedman authored
llvm-svn: 135018
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Bill Wendling authored
llvm-svn: 135015
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Bill Wendling authored
llvm-svn: 135014
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Bill Wendling authored
assert when the frame pointer is -1 (i.e., the function is "frameless"). Still to do: "frameless" unwind information. llvm-svn: 135013
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- Jul 11, 2011
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Evan Cheng authored
and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
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- Jul 09, 2011
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Evan Cheng authored
CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. llvm-svn: 134795
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Eli Friedman authored
Really force on 64bit for 64-bit targets. Should fix remaining failures on unknown x86/non-x86 targets. llvm-svn: 134773
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Eli Friedman authored
Revert earlier unnecessary hack. Make sure we correctly force on 64bit and cmov for 64-bit targets. llvm-svn: 134768
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Evan Cheng authored
llvm-svn: 134757
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Eli Friedman authored
Default 64-bit target features and SSE2 on when a triple specifies x86-64. Clean up all the other hacks which are now unnecessary. llvm-svn: 134753
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- Jul 08, 2011
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Julien Lerouge authored
http://llvm.org/bugs/show_bug.cgi?id=10305 llvm-svn: 134744
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Cameron Zwarich authored
is to use this for architectures that have a native FMA instruction. llvm-svn: 134742
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Evan Cheng authored
llvm-svn: 134741
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Benjamin Kramer authored
Found by valgrind. llvm-svn: 134738
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Evan Cheng authored
llvm-svn: 134721
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Evan Cheng authored
- Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
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Nick Lewycky authored
Fixes PR9602! llvm-svn: 134665
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Eric Christopher authored
processor supports it just fine. Fixes PR9675 and rdar://9740801 llvm-svn: 134664
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Eric Christopher authored
Part of PR10299 and rdar://9740322 llvm-svn: 134653
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Eric Christopher authored
Fixes PR10149 and rdar://9738585 llvm-svn: 134648
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- Jul 07, 2011
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Evan Cheng authored
llvm-svn: 134641
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Evan Cheng authored
llvm-svn: 134606
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Bill Wendling authored
llvm-svn: 134595
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Bill Wendling authored
llvm-svn: 134577
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Evan Cheng authored
llvm-svn: 134546
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- Jul 06, 2011
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Bill Wendling authored
llvm-svn: 134527
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