// rdar://12233989

llvm-svn: 163338

Don't try to check override control for invalid member functions. Fixes a crash in a corner case. Patch by Olivier Goffart!

llvm-svn: 163337

The RegisterCoalescer understands overlapping live ranges where one
register is defined as a copy of the other. With this change, register
allocators using LiveRegMatrix can do the same, at least for copies
between physical and virtual registers.

When a physreg is defined by a copy from a virtreg, allow those live
ranges to overlap:

  %CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11
  %vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill>

We can assign %vreg11 to %ECX, overlapping the live range of %CL.

llvm-svn: 163336

We will soon allow virtual register live ranges to overlap regunit live
ranges when the physreg is defined as a copy of the virtreg:

  %EAX = COPY %vreg5
  FOO %vreg5
  BAR %EAX<kill>

There is no real interference since %vreg5 and %EAX have the same value
where they overlap.

This patch prevents addKillFlags from adding virtreg kill flags to FOO
where the assigned physreg is overlapping the virtual register live
range.

llvm-svn: 163335

Kill flags are difficult to maintain, and liveness queries are better
handled by live intervals.

Kill flags are reinserted after register allocation by addKillFlags().

llvm-svn: 163334

This patch uses a new ABIInfo implementation specific to the le32
target, rather than falling back to DefaultABIInfo. Its behavior is
basically the same, but it also allows the regparm argument attribute.
It also includes basic tests for argument codegen and attributes.

llvm-svn: 163333

llvm-svn: 163332

Enabling the UTF conversion routines that were previously conditionally ifdef'ed out. This change is required to support enhancements in the LLDB data formatters

llvm-svn: 163331

Fixing the return type information for objc_sync_enter and objc_sync_exit.  Patch thanks to Joe Ranieri!

llvm-svn: 163330

   Don't warn if annotated decl is used inside another
   unused. // rdar://12233989

llvm-svn: 163329

These tests were failing for me because the .* was greedily matching up
to the /libexec/ld-elf.so.1" later on the same line.

llvm-svn: 163328

llvm-svn: 163327

llvm-svn: 163326

llvm-svn: 163325

llvm-svn: 163324

Patch by Chris Lidbury.

llvm-svn: 163323

tsan: increase max shadow stack size + reduce memory consumption at the same time (by not memorizing full stacks in traces)

llvm-svn: 163322

Patch by Chris Lidbury.

llvm-svn: 163321

llvm-svn: 163320

Enhances basic alias analysis to recognize phis whose first incoming values are
NoAlias and whose other incoming values are just the phi node itself through
some amount of recursion.

Example: With this change basicaa reports that ptr_phi and ptr_phi2 do not alias
each other.

bb:
 ptr = ptr2 + 1

loop:
  ptr_phi = phi [bb, ptr], [loop, ptr_plus_one]
  ptr2_phi = phi [bb, ptr2], [loop, ptr2_plus_one]
  ...
  ptr_plus_one = gep ptr_phi, 1
  ptr2_plus_one = gep ptr2_phi, 1

This enables the elimination of one load in code like the following:

extern int foo;

int test_noalias(int *ptr, int num, int* coeff) {
  int *ptr2 = ptr;
  int result = (*ptr++) * (*coeff--);
  while (num--) {
    *ptr2++ = *ptr;
    result +=  (*coeff--) * (*ptr++);
  }
  *ptr = foo;
  return result;
}

Part 2/2 of fix for PR13564.

llvm-svn: 163319

Patch by Chris Lidbury.

llvm-svn: 163318

If we can show that the base pointers of two GEPs don't alias each other using
precise analysis and the indices and base offset are equal then the two GEPs
also don't alias each other.
This is primarily needed for the follow up patch that analyses NoAlias'ing PHI
nodes.

Part 1/2 of fix for PR13564.

llvm-svn: 163317

llvm-svn: 163316

This Operand type takes a default argument, and is initialized to
this value if it does not appear in a patter.

llvm-svn: 163315

Fix two compiler warnings: must use at least one argument for "..." in a variadic macros, signed vs. unsigned comparison.

llvm-svn: 163314

llvm-svn: 163313

Added generation of VPSHUB instruction for <32 x i8> vector shuffle when possible.

llvm-svn: 163312

llvm-svn: 163311

llvm-svn: 163309

llvm-svn: 163308

llvm-svn: 163307

llvm-svn: 163306

The lookup tables did not get built in a deterministic order.
This makes them get built in the order that the corresponding phi nodes
were found.

llvm-svn: 163305

If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base.

llvm-svn: 163304

llvm-svn: 163303

This adds a transformation to SimplifyCFG that attemps to turn switch
instructions into loads from lookup tables. It works on switches that
are only used to initialize one or more phi nodes in a common successor
basic block, for example:

  int f(int x) {
    switch (x) {
    case 0: return 5;
    case 1: return 4;
    case 2: return -2;
    case 5: return 7;
    case 6: return 9;
    default: return 42;
  }

This speeds up the code by removing the hard-to-predict jump, and
reduces code size by removing the code for the jump targets.

llvm-svn: 163302

This should fix http://code.google.com/p/address-sanitizer/issues/detail?id=105

llvm-svn: 163301

llvm-svn: 163300

Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be
disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics).

llvm-svn: 163299

Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.

llvm-svn: 163298