- Jul 26, 2011
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Chandler Carruth authored
The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
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- Jul 25, 2011
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Evan Cheng authored
llvm-svn: 135974
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- Jul 23, 2011
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Evan Cheng authored
llvm-svn: 135826
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- Jul 22, 2011
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Evan Cheng authored
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC. llvm-svn: 135812
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- Jul 21, 2011
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Oscar Fuentes authored
llvm-svn: 135698
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Bruno Cardoso Lopes authored
Stefanovic. I removed the part that actually emits the instructions cause I want that to get in better shape first and in incremental steps. This also makes it easier to review the upcoming parts. llvm-svn: 135678
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- Jul 20, 2011
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Evan Cheng authored
- Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
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Akira Hatanaka authored
llvm-svn: 135550
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Akira Hatanaka authored
llvm-svn: 135546
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Akira Hatanaka authored
llvm-svn: 135537
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- Jul 19, 2011
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Akira Hatanaka authored
llvm-svn: 135522
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Akira Hatanaka authored
ANDi, when the instruction does not have any immediate operands. llvm-svn: 135520
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Akira Hatanaka authored
llvm-svn: 135514
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Akira Hatanaka authored
llvm-svn: 135496
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Akira Hatanaka authored
- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the instruction being expanded, instead of masking it in thisMBB. - Remove redundant Or in EmitAtomicCmpSwap. llvm-svn: 135495
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Akira Hatanaka authored
basic blocks. llvm-svn: 135490
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Evan Cheng authored
(including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
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Akira Hatanaka authored
ExpandISelPseudos::runOnMachineFunction does not visit instructions that have just been added. llvm-svn: 135465
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Akira Hatanaka authored
llvm-svn: 135464
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Evan Cheng authored
better location welcome). llvm-svn: 135438
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- Jul 18, 2011
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Evan Cheng authored
to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
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Akira Hatanaka authored
llvm-svn: 135418
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Akira Hatanaka authored
moving them out of the loop. Previously, stores and loads to a stack frame object were inserted to accomplish this. Remove the code that was needed to do this. Patch by Sasa Stankovic. llvm-svn: 135415
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Akira Hatanaka authored
virtual registers are used. llvm-svn: 135403
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Chris Lattner authored
llvm-svn: 135375
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- Jul 15, 2011
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Evan Cheng authored
solution but it is a small step towards removing the horror that is TargetAsmInfo. llvm-svn: 135237
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Evan Cheng authored
Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
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- Jul 14, 2011
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Evan Cheng authored
registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
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- Jul 11, 2011
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Evan Cheng authored
and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
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- Jul 09, 2011
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Evan Cheng authored
CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. llvm-svn: 134795
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- Jul 08, 2011
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Cameron Zwarich authored
is to use this for architectures that have a native FMA instruction. llvm-svn: 134742
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Benjamin Kramer authored
llvm-svn: 134730
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Evan Cheng authored
- Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
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Akira Hatanaka authored
llvm-svn: 134671
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Akira Hatanaka authored
llvm-svn: 134668
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Akira Hatanaka authored
llvm-svn: 134661
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Akira Hatanaka authored
llvm-svn: 134645
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- Jul 07, 2011
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Akira Hatanaka authored
based on a modifier, split it into two functions. llvm-svn: 134637
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Akira Hatanaka authored
llvm-svn: 134633
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Akira Hatanaka authored
llvm-svn: 134630
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