llvm-svn: 163808

Rename the flag which protects from escaped allocas, which may come from bugs in user code or in the compiler. Also, dont assert if the protection is not enabled.

llvm-svn: 163807

The current implementation does not allow more than 32 types to be properly handled with target lowering. This doubles the size to 64bit types and easily allows extension to more types.

llvm-svn: 163806

llvm-svn: 163805

llvm-svn: 163803

by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.

Fix rdar://12281066 PR13813.

llvm-svn: 163802

llvm-svn: 163801

Use Nick's suggestion of storing a large NULL into the GV instead of memset, which requires TargetData.

llvm-svn: 163799

Stack Coloring: We have code that checks that all of the uses of allocas
are within the lifetime zone. Sometime legitimate usages of allocas are
hoisted outside of the lifetime zone. For example, GEPS may calculate the
address of a member of an allocated struct. This commit makes sure that
we only check (abort regions or assert) for instructions that read and write
memory using stack frames directly. Notice that by allowing legitimate
usages outside the lifetime zone we also stop checking for instructions
which use derivatives of allocas. We will catch less bugs in user code
and in the compiler itself.

llvm-svn: 163791

* wrap code blocks in \code ... \endcode;
* refer to parameter names in paragraphs correctly (\arg is not what most
  people want -- it starts a new paragraph).

llvm-svn: 163790

llvm-svn: 163787

llvm-svn: 163783

llvm-svn: 163782

Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren.

llvm-svn: 163774

The assumption that the target address for the relocation will always be
sizeof(intptr_t) and will always contain an addend for the relocation
value is very wrong. Default to no addend for now.

rdar://12157052

llvm-svn: 163765

When comparing to the macho relocation type enum value, make sure we're only
comparing against the bits in the RelType that correspond.

llvm-svn: 163764

llvm-svn: 163763

We don't have enough GR64_TC registers when calling a varargs function
with 6 arguments. Since %al holds the number of vector registers used,
only %r11 is available as a scratch register.

This means that addressing modes using both base and index registers
can't be folded into TCRETURNmi64.

<rdar://problem/12282281>

llvm-svn: 163761

This function writes out the current values of the counters and then resets
them. This can be used similarly to the __gcov_flush function to sync the
counters when need be. For instance, in a situation where the application
doesn't exit.
<rdar://problem/12185886>

llvm-svn: 163757

    Add some support for dealing with an object pointer on arguments.

    Part of rdar://9797999

which now supports adding the object pointer attribute to the
subprogram as it should.

llvm-svn: 163754

1. Remove RA from list of allocatable registers
2. Enable d,y,r constraint inline assembly instructions

Patch by Reed Kotler.

llvm-svn: 163753

    
- BlockAddress has no support of BA + offset form and there is no way to
  propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
  simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
  support BA + offset addressing.

llvm-svn: 163743

llvm-svn: 163739

Remove an overly-aggressive assertion.  The code following this assertion already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG.

llvm-svn: 163736

llvm-svn: 163735

This should be done on the subprogram, not the variable itself.

llvm-svn: 163734

llvm-svn: 163729

llvm-svn: 163726

to the default target.

llvm-svn: 163724

llvm-svn: 163721

was fixed in r163713.

llvm-svn: 163715

llvm-svn: 163714

This patch corrects logic in PPCFrameLowering for save and restore of                                              
nonvolatile condition register fields across calls under the SVR4 ABIs.                                            
                                                                                                                   
 * With the 64-bit ABI, the save location is at a fixed offset of 8 from                                           
the stack pointer.  The frame pointer cannot be used to access this                                                
portion of the stack frame since the distance from the frame pointer may                                           
change with alloca calls.                                                                                          
                                                                                                                   
 * With the 32-bit ABI, the save location is just below the general
register save area, and is accessed via the frame pointer like the rest
of the save areas.  This is an optional slot, so it must only be created                                           
if any of CR2, CR3, and CR4 were modified.                                                                      
                                                                                                                   
 * For both ABIs, save/restore logic is generated only if one of the     
nonvolatile CR fields were modified.                                   

I also took this opportunity to clean up an extra FIXME in
PPCFrameLowering.h.  Save area offsets for 32-bit GPRs are meaningless
for the 64-bit ABI, so I removed them for correctness and efficiency.


Fixes PR13708 and partially also PR13623. It lets us enable exception handling
on PPC64.

Patch by William J. Schmidt!

llvm-svn: 163713

llvm-svn: 163710

Fix constant folding through bitcasts by no longer relying on undefined behaviour (converting NaN values between float and double).

SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget);
should not be used when Val is not a simple constant (as the comment in
SelectionDAG.h indicates). This patch avoids using this function
when folding an unknown constant through a bitcast, where it cannot be
guaranteed that Val will be a simple constant.

llvm-svn: 163703

Add a flag to disable the code that looks for allocas which escaped the lifetime regions. This is useful for debugging. No testcase because without this check we fail on assertions when finding escaped allocas.

llvm-svn: 163702

Add a function computeRegisterLiveness() to MachineBasicBlock. This uses analyzePhysReg() from r163694 to heuristically try and determine the liveness state of a physical register upon arrival at a particular instruction in a block.

The search for liveness is clipped to a specific number of instructions around the target MachineInstr, in order to avoid degenerating into an O(N^2) algorithm. It tries to use various clues about how instructions around (both before and after) a given MachineInstr use that register, to determine its state at the MachineInstr.

llvm-svn: 163695

Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses an instruction's use of a physical register, analogous to analyzeVirtReg.

Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo.

llvm-svn: 163694

was printing a newline that doesn't occur when printing other kinds
of LLVM values.  Move the printing of that newline elsewhere, making
globals print the same as other values while leaving the output when
printing an entire module unchanged.  Patch by Saša Tomić.

llvm-svn: 163693

llvm-svn: 163687