section to help prep some code to be split about.

llvm-svn: 170088

given the section.

llvm-svn: 170087

llvm-svn: 170085

No functionality change.

llvm-svn: 170084

No functionality change.

llvm-svn: 170080

Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039

llvm-svn: 170078

No functionality change.

llvm-svn: 170077

No functionality change.

llvm-svn: 170076

No functionality change.

llvm-svn: 170075

No functionality change.

llvm-svn: 170073

No functionality change.

llvm-svn: 170072

No functionality change.

llvm-svn: 170071

No functionality change.

llvm-svn: 170069

and separate encoding information from the rest.

llvm-svn: 170066

Better controls the inlining of functions when the caller function has MinSize attribute.
Basically, when the caller function has this attribute, we do not "force" the inlining
of callee functions carrying the InlineHint attribute (i.e., functions defined with
inline keyword)

llvm-svn: 170065

This function is going to be removed.

llvm-svn: 170064

MipsInstrFPU.td.
 

llvm-svn: 170061

 

llvm-svn: 170060

 

llvm-svn: 170057

FFR2P_M.
 

llvm-svn: 170055

 

llvm-svn: 170054

FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one
correspondence with the instructions in the ISA manual.
 

llvm-svn: 170053

llvm-svn: 170052

Teach the cost model about the optimization in r169904: Truncation of induction variables costs the same as scalar trunc. 

llvm-svn: 170051

llvm-svn: 170050

Make the MCStreamer have a reset method and call that after finalization of the asm printer, 
also changed MCContext to a single reset only method for simplicity as requested on the list

llvm-svn: 170041

should only occur on invalid input.  Instruction matching errors aren't
unexpected, so we can't rely on the AsmParsers HadError variable directly.
rdar://12840278

llvm-svn: 170037

YAMLIO: Remove all of the template instantiation hacks, I don't see why they're necessary and it breaks linking of the unit tests.

Also comes with a clang-format run on the cpp file, it had major style violations.

llvm-svn: 170036

llvm-svn: 170030

llvm-svn: 170024

llvm-svn: 170022

llvm-svn: 170021

llvm-svn: 170020

structures to and from YAML using traits.  The first client will
be the test suite of lld.  The documentation will show up at:

   http://llvm.org/docs/YamlIO.html

llvm-svn: 170019

load / store pair. It's not legal to use a wider load than the size of
the remaining bytes if it's the first pair of load / store.

llvm-svn: 170018

llvm-svn: 170012

llvm-svn: 170007

llvm-svn: 170005

LoopVectorizer: Use the "optsize" attribute to decide if we are allowed to increase the function size.

llvm-svn: 170004

PowerPC target.  This is the last of the four models, so we now have 
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly.  The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.

Bill

llvm-svn: 170003