Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.

Conflicts:

	lib/CodeGen/MachineSink.cpp

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testcases this time.

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Move part of SSE 1 & 2 compare, shuffle and unpack instructions closely. Preparing them for refactoring and to the addition of their AVX forms

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Add AVX regular (non-aliased ones) and,or,xor,andn packed instructions. They are already tested in the MC framework, no test needed

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Based on a patch by Patrick Marlier!

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I was trying to do some refactoring on the copyRegToReg, but this is realyl a work in progress and not generally useful yet.

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AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.

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and operand renaming to help.

The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.

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segment prefixes.  Daniel wrote most of this patch.

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on calls and similar instructions.

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original basic block. This avoids trouble with examining
instructions in other basic blocks which haven't been
assigned registers yet.

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SDNode *, since it doesn't care about the ResNo value.

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