- Jun 20, 2008
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Duncan Sands authored
float expansion (and sometimes vector splitting too). llvm-svn: 52548
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Duncan Sands authored
integer of the same type. Before it was "promotion", but this is confusing because it is quite different to promotion of integers. Call it "softening" instead, inspired by "soft float". llvm-svn: 52546
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Dan Gohman authored
llvm-svn: 52545
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Dan Gohman authored
llvm-svn: 52522
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Dan Gohman authored
llvm-svn: 52517
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Dan Gohman authored
llvm-svn: 52516
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Evan Cheng authored
llvm-svn: 52508
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- Jun 19, 2008
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Dan Gohman authored
llvm-svn: 52495
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Evan Cheng authored
llvm-svn: 52487
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Owen Anderson authored
llvm-svn: 52485
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Evan Cheng authored
llvm-svn: 52480
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Evan Cheng authored
llvm-svn: 52479
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Evan Cheng authored
llvm-svn: 52477
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Owen Anderson authored
add new instructions. llvm-svn: 52475
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- Jun 18, 2008
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Argyrios Kyrtzidis authored
According to DWARF-2 specification, the line information is provided through an offset in the .debug_line section. Replace the label reference that is used with a section offset. llvm-svn: 52468
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Evan Cheng authored
llvm-svn: 52452
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Evan Cheng authored
llvm-svn: 52450
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- Jun 17, 2008
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Evan Cheng authored
llvm-svn: 52431
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Evan Cheng authored
llvm-svn: 52430
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Evan Cheng authored
It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. movl %eax, %eax on x86-64 actually does a zero-extend. llvm-svn: 52421
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Duncan Sands authored
rather than bundling them together. Rename FloatToInt to PromoteFloat (better, if not perfect). Reorganize files by types rather than by operations. llvm-svn: 52408
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Chris Lattner authored
of value info (sign/zero ext info) from one MBB to another. This doesn't handle much right now because of two limitations: 1) only handles zext/sext, not random bit propagation (no assert exists for this) 2) doesn't handle phis. llvm-svn: 52383
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Duncan Sands authored
llvm-svn: 52381
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Evan Cheng authored
llvm-svn: 52373
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- Jun 16, 2008
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Owen Anderson authored
llvm-svn: 52345
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Owen Anderson authored
impact on code quality or compile time. llvm-svn: 52329
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Duncan Sands authored
still excluding types like i1 (not byte sized) and i120 (loading an i120 requires loading an i64, an i32, an i16 and an i8, which is expensive). llvm-svn: 52310
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Evan Cheng authored
llvm-svn: 52309
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Evan Cheng authored
llvm-svn: 52308
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Owen Anderson authored
llvm-svn: 52306
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Owen Anderson authored
Assign indices to empty basic blocks. This will be necessary for StrongPHIElimination in the near future. llvm-svn: 52300
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- Jun 15, 2008
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Duncan Sands authored
not valid if the load is volatile. Hopefully all wrong DAG combiner transforms of volatile loads and stores have now been caught. llvm-svn: 52293
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Duncan Sands authored
a non-constant index. llvm-svn: 52292
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- Jun 14, 2008
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Duncan Sands authored
on some code when !AfterLegalize - but since this whole code section is turned off by an "if (0)" it's not really turning anything on. llvm-svn: 52276
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Andrew Lenharth authored
llvm-svn: 52270
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Evan Cheng authored
Teach the spiller to commute instructions in order to fold a reload. This hits 410 times on 444.namd and 122 times on 252.eon. llvm-svn: 52266
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- Jun 13, 2008
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Duncan Sands authored
wrong for volatile loads and stores. In fact this is almost all of them! There are three types of problems: (1) it is wrong to change the width of a volatile memory access. These may be used to do memory mapped i/o, in which case a load can have an effect even if the result is not used. Consider loading an i32 but only using the lower 8 bits. It is wrong to change this into a load of an i8, because you are no longer tickling the other three bytes. It is also unwise to make a load/store wider. For example, changing an i16 load into an i32 load is wrong no matter how aligned things are, since the fact of loading an additional 2 bytes can have i/o side-effects. (2) it is wrong to change the number of volatile load/stores: they may be counted by the hardware. (3) it is wrong to change a volatile load/store that requires one memory access into one that requires several. For example on x86-32, you can store a double in one processor operation, but to store an i64 requires two (two i32 stores). In a multi-threaded program you may want to bitcast an i64 to a double and store as a double because that will occur atomically, and be indivisible to other threads. So it would be wrong to convert the store-of-double into a store of an i64, because this will become two i32 stores - no longer atomic. My policy here is to say that the number of processor operations for an illegal operation is undefined. So it is alright to change a store of an i64 (requires at least two stores; but could be validly lowered to memcpy for example) into a store of double (one processor op). In short, if the new store is legal and has the same size then I say that the transform is ok. It would also be possible to say that transforms are always ok if before they were illegal, whether after they are illegal or not, but that's more awkward to do and I doubt it buys us anything much. However this exposed an interesting thing - on x86-32 a store of i64 is considered legal! That is because operations are marked legal by default, regardless of whether the type is legal or not. In some ways this is clever: before type legalization this means that operations on illegal types are considered legal; after type legalization there are no illegal types so now operations are only legal if they really are. But I consider this to be too cunning for mere mortals. Better to do things explicitly by testing AfterLegalize. So I have changed things so that operations with illegal types are considered illegal - indeed they can never map to a machine operation. However this means that the DAG combiner is more conservative because before it was "accidentally" performing transforms where the type was illegal because the operation was nonetheless marked legal. So in a few such places I added a check on AfterLegalize, which I suppose was actually just forgotten before. This causes the DAG combiner to do slightly more than it used to, which resulted in the X86 backend blowing up because it got a slightly surprising node it wasn't expecting, so I tweaked it. llvm-svn: 52254
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- Jun 11, 2008
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Duncan Sands authored
maps can be deleted. This happens when RAUW replaces a node N with another equivalent node E, deleting the first node. Solve this by adding (N, E) to ReplacedNodes, which is already used to remap nodes to replacements. This means that deleted nodes are being allowed in maps, which can be delicate: the memory may be reused for a new node which might get confused with the old deleted node pointer hanging around in the maps, so detect this and flush out maps if it occurs (ExpungeNode). The expunging operation is expensive, however it never occurs during a llvm-gcc bootstrap or anywhere in the nightly testsuite. It occurs three times in "make check": Alpha/illegal-element-type.ll, PowerPC/illegal-element-type.ll and X86/mmx-shift.ll. If expunging proves to be too expensive then there are other more complicated ways of solving the problem. In the normal case this patch adds the overhead of a few more map lookups, which is hopefully negligable. llvm-svn: 52214
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- Jun 10, 2008
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Dan Gohman authored
value, which is something that apparently isn't used much. llvm-svn: 52158
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- Jun 09, 2008
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Dan Gohman authored
llvm-svn: 52156
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