Commits · 9b8cd5fe5507fdd1992e6a77a91cda0f7f3af80b · Roger Ferrer / llvm-epi-0.8 · GitLab

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Apr 01, 2018
- [X86] Don't check for folding into a store when deciding if we can promote an i16 mul. · 9b8cd5fe
  Craig Topper authored Apr 01, 2018
  9b8cd5fe
- [X86] Check if the load and store are to the same pointer before preventing... · db6caabc
  Craig Topper authored Apr 01, 2018
  db6caabc
- [X86] Allow i16 subtracts to be promoted if the load is on the LHS and its not being stored. · ae2de57d
  Craig Topper authored Apr 01, 2018
  ae2de57d
- [X86] Remove unneeded temporary variable. NFC · 9bc0d881
  Craig Topper authored Apr 01, 2018
  9bc0d881
Mar 31, 2018
- [X86][Btver2] Add MMX_PSHUFB to the JWritePSHUFB InstRW entries · 3b8ad346
  Simon Pilgrim authored Mar 31, 2018
  3b8ad346
- Fix trailing whitespace. NFCI. · 8c8ebd79
  Simon Pilgrim authored Mar 31, 2018
  8c8ebd79
- [X86] Add SchedRW for PMULLD · 13a0f83a
  Craig Topper authored Mar 31, 2018
  13a0f83a
- Fix a bunch of typoes. NFC · 956ee797
  Fangrui Song authored Mar 30, 2018
  956ee797
Mar 30, 2018
- [WebAssembly] Register wasm passes with the PassRegistry · 40926451
  Jacob Gravelle authored Mar 30, 2018
  40926451
- [Hexagon] Reduce excessive indentation in .s output · 74096f72
  Krzysztof Parzyszek authored Mar 30, 2018
  74096f72
- [Hexagon] Avoid creating invalid offsets in packetizer · 0f983d69
  Krzysztof Parzyszek authored Mar 30, 2018
  0f983d69
- [X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and · dc97172b
  Andrea Di Biagio authored Mar 30, 2018
  dc97172b
- [X86][BtVer2] Fix the number of uOps for horizontal operations. · 3eaa26bb
  Andrea Di Biagio authored Mar 30, 2018
  3eaa26bb
- [NVPTX] Enable StructuredCFG for NVPTX · 8f9f0269
  Tim Shen authored Mar 30, 2018
  8f9f0269
- [WebAssembly] Refactor tablegen for store instructions (NFC) · a2726e9a
  Derek Schuff authored Mar 30, 2018
  a2726e9a
- Revert "peel loops with runtime small trip counts" · fce30c2b
  Krzysztof Parzyszek authored Mar 30, 2018
  fce30c2b
- [AMDGPU] Fixed some instructions latencies · 74e2974a
  Stanislav Mekhanoshin authored Mar 30, 2018
  74e2974a
- [Hexagon] Recognize and handle :endloop01 · 4f99836a
  Krzysztof Parzyszek authored Mar 30, 2018
  4f99836a
- [Hexagon] Fix printing :mem_noshuf on compiler-generated packets · 46abcb23
  Krzysztof Parzyszek authored Mar 30, 2018
  46abcb23
- [X86][BtVer2] Add missing ReadAfterLd to RM variants of AVX horizontal adds and · 073a9d74
  Andrea Di Biagio authored Mar 30, 2018
  073a9d74
- [Hexagon] Remove unused scheduling classes · 3f55ad8f
  Krzysztof Parzyszek authored Mar 30, 2018
  3f55ad8f
- [Hexagon] Pass pointer to SelectionDAG to dump functions · 1ca23d98
  Krzysztof Parzyszek authored Mar 30, 2018
  1ca23d98
- [AMDGPU] Fix the SDWA Peephole phase to handle src for dst:UNUSED_PRESERVE. · 59e5ef79
  Michael Bedy authored Mar 30, 2018
  59e5ef79
- peel loops with runtime small trip counts · 66c8ba5a
  Ikhlas Ajbar authored Mar 30, 2018
  66c8ba5a
- Remove some unneeded #includes to fix layering · bd0c8807
  David Blaikie authored Mar 29, 2018
  bd0c8807
- [X86] Add ReadAfterLds to some 3 src instructions · ee3c19fd
  Craig Topper authored Mar 29, 2018
  ee3c19fd
Mar 29, 2018
- AMDGPU: Fix build warning in release · efd1b304
  Matt Arsenault authored Mar 29, 2018
  efd1b304
- AMDGPU: Support realigning stack · 03ae399d
  Matt Arsenault authored Mar 29, 2018
  03ae399d
- [X86] Remove ReadAfterLd from BMI and TBM instructions that don't have a... · 3f2dbec6
  Craig Topper authored Mar 29, 2018
  3f2dbec6
- [X86] Correct the placement of ReadAfterLd in BEXTR and BZHI. Add dedicated SchedRW for BEXTR/BZHI. · 89310f56
  Craig Topper authored Mar 29, 2018
  89310f56
- AMDGPU: Increase default stack alignment · ffb132e7
  Matt Arsenault authored Mar 29, 2018
  ffb132e7
- AMDGPU: Fix selection error on constant loads with < 4 byte alignment · 6c041a3c
  Matt Arsenault authored Mar 29, 2018
  6c041a3c
- [Mips] Change std::sort to llvm::sort in response to r327219 · 10d8b855
  Mandeep Singh Grang authored Mar 29, 2018
  10d8b855
- [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer. · 2fa14362
  Craig Topper authored Mar 29, 2018
  2fa14362
- [Hexagon] Add support to handle bit-reverse load intrinsics · dc7a557e
  Krzysztof Parzyszek authored Mar 29, 2018
  dc7a557e
- [X86][SSE] Don't bother re-adding combined target shuffles to the work list · 71c5f3ff
  Simon Pilgrim authored Mar 29, 2018
  71c5f3ff
- [Mips] Remove dead code · 32a27fc7
  Simon Dardis authored Mar 29, 2018
  32a27fc7
- [X86] Don't pass getRegisterName from the InstPrinters into... · a21758fa
  Craig Topper authored Mar 29, 2018
  a21758fa
- [X86] Rename RIi64_NOREX tblgen class to just Ii64. Make RIi64 inherit from it. NFC · 7456af88
  Craig Topper authored Mar 29, 2018
  7456af88
- [X86] Cleanup inheritance of the X86InstrFormats.td classes. NFC · 7441ffff
  Craig Topper authored Mar 29, 2018
  7441ffff