llvm-svn: 74022

llvm-svn: 73990

instructions, which implies that there is an explicit memory operand.  There is
(however) no explicit memory operand; although this is a store, the only memory
operand is implicit, indicated by DS:EDI.  This causes the table-generation code
for the disassembler to report an error."

Patch by Sean Callanan!

llvm-svn: 73989

llvm-svn: 73987

llvm-svn: 73986

Add IsThumb1Only to most 16-bit thumb instructions since we want to isel 32-bit instructions when they are available.

llvm-svn: 73985

llvm-svn: 73975

cleans up the CMake-based build system a bit. Started by a patch from
Xerxes Rånby.

llvm-svn: 73969

llvm-svn: 73967

also some contribution from Jim Grosbach, Bob Wilson, and Evan Cheng.

I've done my best to consolidate the patches with those that were done by
Viktor Kutuzov and Anton Korzh from Access Softek, Inc. Let me know if missed
anything. I've completely reorganized the thumb2 td file, made more extensive
uses of multiclass, etc.

Test cases will be contributed later after I re-organize what's in svn first.

llvm-svn: 73965

Fold the add (ptr, offset) into ptr[offset] only if the offset is small enough. movwi and moviw allow value of 5-bits only (i.e. 32).

llvm-svn: 73953

llvm-svn: 73948

llvm-svn: 73947

llvm-svn: 73928

This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919

another change that makes the types ambiguous (at least as far as tablegen
is concerned).

llvm-svn: 73909

for "thumb" and add a check for V6T2.

llvm-svn: 73905

caller-saved register.

llvm-svn: 73901

Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes

llvm-svn: 73894

llvm-svn: 73893

predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.

llvm-svn: 73887

Handle FpSET_ST0_80 being used when ST0 is still alive.

llvm-svn: 73850

llvm-svn: 73841

llvm-svn: 73840

llvm-svn: 73837

llvm-svn: 73836

a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.

llvm-svn: 73834

with MBB's.

llvm-svn: 73830

it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.

llvm-svn: 73829

llvm-svn: 73824

llvm-svn: 73818

LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.

llvm-svn: 73817

llvm-svn: 73815

llvm-svn: 73813

llvm-svn: 73811

step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.

llvm-svn: 73810

on X86.  Not useful yet.

llvm-svn: 73799

llvm-svn: 73792

llvm-svn: 73791

llvm-svn: 73786