When a register is defined by a partial load:

  %reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234

That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.

This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.

llvm-svn: 110874

llvm-svn: 110873

llvm-svn: 110872

linker in use.

llvm-svn: 110871

llvm-svn: 110870

-There are 2 instances that change the TokenID for GNU libstdc++ 4.2 compatibility.
  To handler those cases introduce a RevertedTokenID bitfield, RevertTokenIDToIdentifier() and hasRevertedTokenIDToIdentifier() methods.
  Store the bitfield in PCH.

llvm-svn: 110868

treats that as a contract to be fulfilled by any replacements.

llvm-svn: 110864

llvm-svn: 110863

 - remove ashr which never worked.
 - fix lshr and shl and add tests.
 - remove dead function "intersect1Wrapped".
 - add a new sub method to subtract ranges, with test.

llvm-svn: 110861

llvm-svn: 110860

the code-completion consumer. The consumer can use this information to
augument, filter, or display the code-completion results.

llvm-svn: 110858

radar 7948654.

llvm-svn: 110857

llvm-svn: 110854

Emit a stop point for delegate constructor call. This gives user a chance to step into constructor body.

llvm-svn: 110853

instead of _Unwind_Resume.  With SJLJ exceptions, this is spelled
"_Unwind_SjLj_Resume_or_Rethrow", not "_Unwind_SjLj_Resume", which has
significantly different semantics.

We should actually never be generating a call to _Unwind_SjLj_Resume directly;
even if we were generating true cleanups (which we aren't because of the
horrible hack), we should be calling __cxa_end_cleanup() on ARM.  I
haven't implemented this because there's little point as long as the HH is
present.

I believe this fixes <rdar://problem/8281377>.

llvm-svn: 110851

in the code after the "FIXME: Needs to be written".

llvm-svn: 110849

and remove casts from all its callers.

llvm-svn: 110848

llvm-svn: 110847

llvm-svn: 110845

llvm-svn: 110844

llvm-svn: 110843

llvm-svn: 110842

property-dot syntax.

llvm-svn: 110841

llvm-svn: 110840

llvm-svn: 110839

that many of these things, so the memory savings isn't significant,
and there are now situations where there can be alignments greater
than 128.

llvm-svn: 110836

avoids trouble if the return type of TD->getPointerSize() is
changed to something which doesn't promote to a signed type,
and is simpler anyway.

Also, use getCopyFromReg instead of getRegister to read a
physical register's value.

llvm-svn: 110835

llvm-svn: 110834

llvm-svn: 110833

types. Fixes PR7865.

llvm-svn: 110832

llvm-svn: 110831

platform. It's apparently "bl __muldf3" on linux, for example. Since that's
not what we're checking here, it's more robust to just force a triple. We
just wwant to check that the inline FP instructions are only generated
on cpus that have them."

llvm-svn: 110830

llvm-svn: 110829

llvm-svn: 110828

#ifdef around Solaris/Linux/Darwin-specific error codes and replace them with their BSD equivalents if they are not available.

llvm-svn: 110827

llvm-svn: 110826

properly investigated.

llvm-svn: 110825

llvm-svn: 110824

clang_reparseTranslationUnit(), along with a function to retrieve the
default recommended reparsing options for a translation unit.

Also, add the CXTranslationUnit_CacheCompletionResults flag, which is
also currently unused.

llvm-svn: 110811

llvm-svn: 110810