enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden

llvm-svn: 42870

No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.

llvm-svn: 42865

llvm-svn: 42864

illegal.  Thanks to gabor for pointing this out!

llvm-svn: 42832

llvm-svn: 42824

Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822

llvm-svn: 42821

Fix an extremely stupid bug that prevented first round of coalescing (physical registers only) from happening.

llvm-svn: 42820

llvm-svn: 42815

Do not walk invalid iterator.

llvm-svn: 42812

llvm-svn: 42788

llvm-svn: 42787

llvm-svn: 42786

llvm-svn: 42785

llvm-svn: 42783

llvm-svn: 42781

llvm-svn: 42780

- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)

llvm-svn: 42779

- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.

llvm-svn: 42778

llvm-svn: 42774

for consistency.

llvm-svn: 42769

use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.

llvm-svn: 42762

llvm-svn: 42761

llvm-svn: 42760

Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.

llvm-svn: 42759

llvm-svn: 42757

target-indepenent lowering, don't use them on PowerPC.

llvm-svn: 42755

and individual SDOperand operands.

llvm-svn: 42753

commands and into the common code.

llvm-svn: 42752

llvm-svn: 42751

llvm-svn: 42750

optimization passes.

llvm-svn: 42749

llvm-svn: 42747

llvm-svn: 42746

arbitrary range of bits embedded in the middle of another bignum.
This kind of operation is desirable in many cases of software
floating point, e.g. converting bignum integers to floating point
numbers of fixed precision (you want to extract the precision most
significant bits).

Elsewhere, add an assertion, and exit the shift functions early if
the shift count is zero.

llvm-svn: 42745

Begin the process of allowing DomTree on MBB's.  Step One: template DomTreeNode by making it a typedef of a templated DomTreeNodeBase.

llvm-svn: 42743

llvm-svn: 42742

the Objective Caml 'declare_*' functions to behave more or less like
getOrInsertFunction.

llvm-svn: 42740

llvm-svn: 42739

llvm-svn: 42738