Commits · 9cfbc6d94f6d7ae4c64c88fac3263301ab75e381 · Roger Ferrer / llvm-epi-0.8 · GitLab

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May 11, 2017
- [ARM][GlobalISel] Legalize narrow scalar ops by widening · 9cfbc6d9
  Diana Picus authored May 11, 2017
  9cfbc6d9
- Remove spurious cast of nullptr. NFC. · f4dc59ba
  Serge Guelton authored May 11, 2017
  f4dc59ba
- Remove now useless trailing nullptr in StructType::get · 1b421c25
  Serge Guelton authored May 11, 2017
  1b421c25
- [ARM][GlobalISel] Support for G_ANYEXT · 657bfd33
  Diana Picus authored May 11, 2017
  657bfd33
- [GlobalISel][X86] G_ICMP support. · c7b5977b
  Igor Breger authored May 11, 2017
  c7b5977b
- [X86] Move getX86ConditionCode() from X86FastISel.cpp to X86InstrInfo.cpp. NFC · db754559
  Igor Breger authored May 11, 2017
  db754559
May 10, 2017
- AMDGPU: Make some packed shuffles free · 3c5e4237
  Matt Arsenault authored May 10, 2017
  3c5e4237
- AMDGPU: Add new subtarget features for gfx9 flat instructions · acdc7659
  Matt Arsenault authored May 10, 2017
  acdc7659
- [AArch64][RegisterBankInfo] Change the default mapping of fp stores. · 307e2912
  Quentin Colombet authored May 10, 2017
  307e2912
- [AArch64] Enable use of reduction intrinsics. · 816542ce
  Amara Emerson authored May 10, 2017
  816542ce
- [SystemZ] Add miscellaneous instructions · 93b369ed
  Ulrich Weigand authored May 10, 2017
  93b369ed
- [SystemZ] Add missing arithmetic instructions · d3604dc7
  Ulrich Weigand authored May 10, 2017
  d3604dc7
- [SystemZ] Implement getRepRegClassFor() · 11d251c0
  Jonas Paulsson authored May 10, 2017
  11d251c0
- [AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output · da61a7f9
  Dmitry Preobrazhensky authored May 10, 2017
  da61a7f9
- [SystemZ] Add decimal integer instructions · c7eb5a95
  Ulrich Weigand authored May 10, 2017
  c7eb5a95
- [SystemZ] Add crypto instructions · 33a441ad
  Ulrich Weigand authored May 10, 2017
  33a441ad
- [SystemZ] Add translate/convert instructions · 435cd1a3
  Ulrich Weigand authored May 10, 2017
  435cd1a3
- [SystemZ] Add missing memory/string instructions · eb179095
  Ulrich Weigand authored May 10, 2017
  eb179095
- [AArch64] Fix a comment to match the code. NFC. · 605b0466
  Martin Storsjo authored May 10, 2017
  605b0466
- Add a late IR expansion pass for the experimental reduction intrinsics. · 836b0f48
  Amara Emerson authored May 10, 2017
  836b0f48
- [GlobalISel][X86] G_ZEXT i1 to i32/i64 support. · fda31e64
  Igor Breger authored May 10, 2017
  fda31e64
May 09, 2017
- [AMDGPU] Fixed typo in GCNRegPressure, NFC · 7e3794d5
  Stanislav Mekhanoshin authored May 09, 2017
  7e3794d5
- [AArch64] Consider widening instructions in cost calculations · 78fd46b2
  Matthew Simpson authored May 09, 2017
  78fd46b2
- Suppress all uses of LLVM_END_WITH_NULL. NFC. · e38003f8
  Serge Guelton authored May 09, 2017
  e38003f8
- [lanai] Add computeKnownBitsForTargetNode for Lanai. · 0dbcc34f
  Jacques Pienaar authored May 09, 2017
  0dbcc34f
- [X86] Add more patterns for BZHI isel · f893d49f
  Craig Topper authored May 09, 2017
  f893d49f
- VX512] Only look at lower bit in constant scalar masks · 0c42d8c3
  Guy Blank authored May 09, 2017
  0c42d8c3
- [Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction instead. NFC. · 04de70d3
  Tim Shen authored May 09, 2017
  04de70d3
- Amend r302535; ifndef and ifdef are different, as it turns out. · 3234647d
  Aaron Ballman authored May 09, 2017
  3234647d
- ARMRegisterBankInfo.h requires LLVM_BUILD_GLOBAL_ISEL to be defined. If it is... · 06297e83
  Aaron Ballman authored May 09, 2017
  06297e83
- Add extra operand to CALLSEQ_START to keep frame part set up previously · d526b13e
  Serge Pavlov authored May 09, 2017
  d526b13e
- Revert "[MIPS] Add support to match more patterns for DINS instruction" · 659c43f1
  Simon Dardis authored May 09, 2017
  659c43f1
- [X86][SSE42] Lower v2i64/v4i64 ASHR(X, 63) as PCMPGTQ(0, X) · ca3a63a8
  Simon Pilgrim authored May 09, 2017
  ca3a63a8
- [X86] Clang option -fuse-init-array has no effect when generating for MCU target · b7bf386e
  Nikolai Bozhenov authored May 09, 2017
  b7bf386e
- [MIPS] Add support to match more patterns for DINS instruction · 27ae4c32
  Strahinja Petrovic authored May 09, 2017
  27ae4c32
- [ARM GlobalISel] Remove hand-written G_FADD selection · 95640a1c
  Diana Picus authored May 09, 2017
  95640a1c
May 08, 2017
- ARM: use divmod libcalls on embedded MachO platforms too. · c48c993b
  Tim Northover authored May 08, 2017
  c48c993b
- [AArch64][RegisterBankInfo] Change the default mapping of fp loads. · 55a72b3b
  Quentin Colombet authored May 08, 2017
  55a72b3b
- [AArch64][RegisterBankInfo] Fix mapping cost for GPR. · 0e41a41b
  Quentin Colombet authored May 08, 2017
  0e41a41b
- [ARM] Use a Changed flag to avoid making a pass's return value dependent on a... · 8297e522
  Craig Topper authored May 08, 2017
  8297e522