- Mar 30, 2013
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Sean Silva authored
llvm-svn: 178421
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Benjamin Kramer authored
llvm-svn: 178420
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Justin Holewinski authored
llvm-svn: 178417
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Justin Holewinski authored
specific code paths. This allows us to write code like: if (__nvvm_reflect("FOO")) // Do something else // Do something else and compile into a library, then give "FOO" a value at kernel compile-time so the check becomes a no-op. llvm-svn: 178416
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Justin Holewinski authored
Hopefully this resolves any outstanding style issues and gives us an automated way of ensuring we conform to the style guidelines. llvm-svn: 178415
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Benjamin Kramer authored
No functionality change. llvm-svn: 178413
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Shuxin Yang authored
rule 1: (x | c1) ^ c2 => (x & ~c1) ^ (c1^c2), only useful when c1=c2 rule 2: (x & c1) ^ (x & c2) = (x & (c1^c2)) rule 3: (x | c1) ^ (x | c2) = (x & c3) ^ c3 where c3 = c1 ^ c2 rule 4: (x | c1) ^ (x & c2) => (x & c3) ^ c1, where c3 = ~c1 ^ c2 It reduces an application's size (in terms of # of instructions) by 8.9%. Reviwed by Pete Cooper. Thanks a lot! rdar://13212115 llvm-svn: 178409
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Akira Hatanaka authored
llvm-svn: 178408
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Akira Hatanaka authored
llvm-svn: 178407
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Akira Hatanaka authored
Check that instruction selection can select multiply-add/sub DSP instructions from a pattern that doesn't have intrinsics. llvm-svn: 178406
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Akira Hatanaka authored
llvm-svn: 178405
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Akira Hatanaka authored
derived class MipsSETargetLowering. We shouldn't be generating madd/msub nodes if target is Mips16, since Mips16 doesn't have support for multipy-add/sub instructions. llvm-svn: 178404
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Akira Hatanaka authored
The new instructions have explicit register output operands and use table-gen patterns instead of C++ code to do instruction selection. Mips16's instructions are unaffected by this change. llvm-svn: 178403
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Akira Hatanaka authored
llvm-svn: 178396
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Akira Hatanaka authored
llvm-svn: 178395
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Akira Hatanaka authored
instructions. llvm-svn: 178394
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Akira Hatanaka authored
called in several places in ScheduleDAGRRList.cpp. llvm-svn: 178393
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Akira Hatanaka authored
to handle accumulator registers. llvm-svn: 178392
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Akira Hatanaka authored
callee-saved scan. The code makes use of register's scavenger's capability to spill multiple registers. llvm-svn: 178391
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Akira Hatanaka authored
registers. llvm-svn: 178390
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Eric Christopher authored
llvm-svn: 178386
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- Mar 29, 2013
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Michael Gottesman authored
Updated test0 of retain-not-declared.ll to reflect the fact that objc-arc-expand runs before objc-arc/objc-arc-contract. Specifically, objc-arc-expand will make sure that the objc_retainAutoreleasedReturnValue, objc_autoreleaseReturnValue, and ret will all have %call as an argument. llvm-svn: 178382
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Jean-Luc Duprat authored
This time tested on both OSX and Linux. llvm-svn: 178377
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Sean Silva authored
std::lower_bound is the canonical "binary search" in the STL (std::binary_search generally is not what you want). The name actually makes a lot of sense (and also has a beautiful symmetry with the std::upper_bound algorithm). The name is nonetheless non-obvious. Also, remove mention of "radix search". It's not even clear how that would work in the context of a sorted vector. AFAIK "radix search" only makes sense when you have a trie-like data structure. llvm-svn: 178376
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Timur Iskhodzhanov authored
llvm-svn: 178375
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Michael Gottesman authored
clang.arc.used is an interesting call for ARC since ObjCARCContract needs to run to remove said intrinsic to avoid a linker error (since the call does not exist). llvm-svn: 178369
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Jyotsna Verma authored
llvm-svn: 178368
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Eric Christopher authored
die values. A lot of DIEs have 10 attributes in C++ code (example clang), none had more than 12. Seems like a good default. llvm-svn: 178366
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Eric Christopher authored
entire original compile unit has been constructed. llvm-svn: 178365
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Adrian Prantl authored
llvm-svn: 178364
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Hal Finkel authored
Like nearbyint, rint can be implemented on PPC using the frin instruction. The complication comes from the fact that rint needs to set the FE_INEXACT flag when the result does not equal the input value (and frin does not do that). As a result, we use a custom inserter which, after the rounding, compares the rounded value with the original, and if they differ, explicitly sets the XX bit in the FPSCR register (which corresponds to FE_INEXACT). Once LLVM has better modeling of the floating-point environment we should be able to (often) eliminate this extra complexity. llvm-svn: 178362
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Akira Hatanaka authored
llvm-svn: 178359
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Andrew Trick authored
A9 uses itinerary classes, Swift uses RW lists. This tripped some verification when we're expanding variants. I had to refine the verification a bit. llvm-svn: 178357
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Matt Arsenault authored
llvm-svn: 178356
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Matt Arsenault authored
llvm-svn: 178355
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Adrian Prantl authored
rdar://problem/12767564 llvm-svn: 178353
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Benjamin Kramer authored
It was superseded by MachineBlockPlacement and disabled by default since LLVM 3.1. llvm-svn: 178349
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Nadav Rotem authored
llvm-svn: 178346
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Jyotsna Verma authored
llvm-svn: 178345
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