llvm-svn: 84250

llvm-svn: 84249

llvm-svn: 84246

Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.

llvm-svn: 83218

Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.

llvm-svn: 83215

Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.

llvm-svn: 83122

Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.

llvm-svn: 80904

Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer.

llvm-svn: 80404

llvm-svn: 78219

Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.

llvm-svn: 78081

Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.

Also, we should be using BLX to call external function stubs.

llvm-svn: 77756

for "thumb" and add a check for V6T2.

llvm-svn: 73905

caller-saved register.

llvm-svn: 73901

llvm-svn: 73734

ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

llvm-svn: 73095

llvm-svn: 72698

llvm-svn: 72593

llvm-svn: 72337

llvm-svn: 72335

ARM target now also recognize triplets like thumbv6-apple-darwin and set thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes.

llvm-svn: 66435

llvm-svn: 66365

llvm-svn: 45418

llvm-svn: 34521

llvm-svn: 34245

llvm-svn: 33363

llvm-svn: 33353