llvm-svn: 84868

Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.

llvm-svn: 84843

llvm-svn: 84831

llvm-svn: 83236

llvm-svn: 83145

Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel.  Radar 7250345.

llvm-svn: 82988

llvm-svn: 82893

llvm-svn: 82838

llvm-svn: 82837

llvm-svn: 81773

llvm-svn: 79773

llvm-svn: 79763

llvm-svn: 79084

x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp

llvm-svn: 78919

don't need to be exported from the .o files.

llvm-svn: 78892

pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802

LLVMTargetMachine ctor.  It is currently unused.

llvm-svn: 78711

llvm-svn: 78666

llvm-svn: 78654

Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.

llvm-svn: 78622

llvm-svn: 78456

that have that constraint.  This is currently just assigning a fixed set of
registers, and it only handles VLDn for n=2,3,4 with DPR registers.
I'm going to expand it to handle more operations next; we can make it smarter
once everything is working correctly.

llvm-svn: 78256

llvm-svn: 78146

Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136

llvm-svn: 78104

 - The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927

Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918

llvm-svn: 77878

llvm-svn: 77233

 - Less boilerplate == good.

llvm-svn: 77052

llvm-svn: 76344

variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886

 - No functionality change.

llvm-svn: 75859

 - No intended functionality change.

llvm-svn: 75848

 - No intended functionality change.

llvm-svn: 75843

--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820

Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799

 - Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782

llvm-svn: 75780

from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778