llvm-svn: 29383

llvm-svn: 29382

llvm-svn: 29376

llvm-svn: 29374

llvm-svn: 29371

llvm-svn: 29370

llvm-svn: 29367

llvm-svn: 29366

llvm-svn: 29365

llvm-svn: 29351

llvm-svn: 29346

llvm-svn: 29322

llvm-svn: 29318

llvm-svn: 29317

llvm-svn: 29310

llvm-svn: 29307

  method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276

llvm-svn: 29275

llvm-svn: 29262

llvm-svn: 29243

llvm-svn: 29234

llvm-svn: 29233

llvm-svn: 29228

llvm-svn: 29215

llvm-svn: 29214

llvm-svn: 29213

llvm-svn: 29210

Missing Darwin check in Intel ATT ASM printer.

llvm-svn: 29204

llvm-svn: 29202

llvm-svn: 29194

llvm-svn: 29153

This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll

llvm-svn: 29118

llvm-svn: 29110

CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll

llvm-svn: 29101

llvm-svn: 29091

Use that information when doing the transformation to merge multiple loads
into a 128-bit load.

llvm-svn: 29090

llvm-svn: 29085

(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret

llvm-svn: 29042

llvm-svn: 28999

llvm-svn: 28992