llvm-svn: 150805

llvm-svn: 150775

llvm-svn: 146960

Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.

llvm-svn: 135219

llvm-svn: 129612

Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.

llvm-svn: 129606

llvm-svn: 127003

llvm-svn: 108366

stomache MCAsmInfo having this, and I found a better solution to
this layering issue.

llvm-svn: 93985

I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.

I may change this in the future, we'll see how it works out.

llvm-svn: 93934

llvm-svn: 79763

pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802

no longer needs a targetmachine to initialize itself.

llvm-svn: 78710

no longer depends on TM!

llvm-svn: 77863

'unnamed' bss section, but some impls would want a named one.  Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.

llvm-svn: 77165

a sad mistake that is regretted. :)

llvm-svn: 76935

a better solution for it in the future.

llvm-svn: 76818

llvm-svn: 54534

It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.

llvm-svn: 54519

llvm-svn: 54350

llvm-svn: 54214

Added ConstantPool support.

llvm-svn: 53951

Fixed small bug.

llvm-svn: 53908

llvm-svn: 53790

llvm-svn: 45418

llvm-svn: 42316

- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461

llvm-svn: 30161