that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467

e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464

  - Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461

  - Add getParent() accessors.
  - Move SubReg out of the AuxInfo union, to make way for future changes.
  - Remove the getImmedValue/setImmedValue methods.
  - in some MachineOperand::Create* methods, stop initializing fields that are dead.

MachineInstr:
  - Delete one copy of the MachineInstr printing code, now there is only one dump
    format and one copy of the code.
  - Make MachineOperand use the parent field to get info about preg register names if
    no target info is otherwise available.
  - Move def/use/kill/dead flag printing to the machineoperand printer, so they are
    always printed for an operand.

llvm-svn: 45460

llvm-svn: 45458

knows how to print offsets.

llvm-svn: 45457

llvm-svn: 45456

llvm-svn: 45455

llvm-svn: 45454

machineinstr that owns it.

llvm-svn: 45449

llvm-svn: 45432

llvm-svn: 45428

llvm-svn: 45418

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

llvm-svn: 42945

(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

are strict about such things.

llvm-svn: 41956

llvm-svn: 40514

llvm-svn: 37599

llvm-svn: 37341

llvm-svn: 37121

llvm-svn: 37064

llvm-svn: 36618

llvm-svn: 36483

llvm-svn: 35363

llvm-svn: 34512

llvm-svn: 34428

Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399

llvm-svn: 34380

llvm-svn: 34343

llvm-svn: 32622

llvm-svn: 32617

now cerr, cout, and NullStream resp.

llvm-svn: 32298

llvm-svn: 32273

- Remove the ugly TargetInstrDescriptors hack.

llvm-svn: 32032

llvm-svn: 31985

llvm-svn: 31957

of opcode and number of operands.

llvm-svn: 31947

instruction.  Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.

This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll

llvm-svn: 31876