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  1. Dec 31, 2007
    • Chris Lattner's avatar
      Rename SSARegMap -> MachineRegisterInfo in keeping with the idea · a10fff51
      Chris Lattner authored
      that "machine" classes are used to represent the current state of
      the code being compiled.  Given this expanded name, we can start 
      moving other stuff into it.  For now, move the UsedPhysRegs and
      LiveIn/LoveOuts vectors from MachineFunction into it.
      
      Update all the clients to match.
      
      This also reduces some needless #includes, such as MachineModuleInfo
      from MachineFunction.
      
      llvm-svn: 45467
      a10fff51
  2. Dec 29, 2007
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  17. Dec 01, 2006
  18. Nov 28, 2006
  19. Nov 09, 2006
  20. Nov 02, 2006
  21. Sep 05, 2006
    • Chris Lattner's avatar
      Fix a long-standing wart in the code generator: two-address instruction lowering · 13a5dcdd
      Chris Lattner authored
      actually *removes* one of the operands, instead of just assigning both operands
      the same register.  This make reasoning about instructions unnecessarily complex,
      because you need to know if you are before or after register allocation to match
      up operand #'s with the target description file.
      
      Changing this also gets rid of a bunch of hacky code in various places.
      
      This patch also includes changes to fold loads into cmp/test instructions in
      the X86 backend, along with a significant simplification to the X86 spill
      folding code.
      
      llvm-svn: 30108
      13a5dcdd
  22. Aug 27, 2006
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  28. Oct 26, 2005
  29. Apr 22, 2005
  30. Jan 19, 2005
  31. Jan 02, 2005
    • Chris Lattner's avatar
      Make the 2-address instruction lowering pass smarter in two ways: · 9590870a
      Chris Lattner authored
      1. If we are two-addressing a commutable instruction and the LHS is not the
         last use of the variable, see if the instruction is the last use of the
         RHS.  If so, commute the instruction, allowing us to avoid a
         register-register copy in many cases for common instructions like ADD, OR,
         AND, etc on X86.
      2. If #1 doesn't hold, and if this is an instruction that also existing in
         3-address form, promote the instruction to a 3-address instruction to
         avoid the register-register copy.  We can do this for several common
         instructions in X86, including ADDrr, INC, DEC, etc.
      
      This patch implements test/Regression/CodeGen/X86/commute-two-addr.ll,
      overlap-add.ll, and overlap-shift.ll when I check in the X86 support for it.
      
      llvm-svn: 19245
      9590870a
  32. Sep 02, 2004
    • Reid Spencer's avatar
      Changes For Bug 352 · 7c16caa3
      Reid Spencer authored
      Move include/Config and include/Support into include/llvm/Config,
      include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
      public header files must be under include/llvm/.
      
      llvm-svn: 16137
      7c16caa3
  33. Aug 16, 2004
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