- Mar 22, 2007
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Evan Cheng authored
where the destination is dead. llvm-svn: 35252
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Reid Spencer authored
* Fix some indentation and comments in InsertRangeTest * Add an "IsSigned" parameter to AddWithOverflow and make it handle signed additions. Also, APIntify this function so it works with any bitwidth. * For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the div instruction's RHS is zero. * Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The HiBound needs to be incremented in order to get the range test correct. llvm-svn: 35247
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- Mar 21, 2007
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Dale Johannesen authored
llvm-svn: 35245
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Anton Korobeynikov authored
llvm-svn: 35244
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Anton Korobeynikov authored
llvm-svn: 35242
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Dale Johannesen authored
llvm-svn: 35241
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Evan Cheng authored
llvm-svn: 35239
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Nicolas Geoffray authored
is the frame pointer. llvm-svn: 35233
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Zhou Sheng authored
some test cases for bitwidth > 64. llvm-svn: 35232
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Evan Cheng authored
llvm-svn: 35230
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- Mar 20, 2007
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Evan Cheng authored
llvm-svn: 35229
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Evan Cheng authored
llvm-svn: 35228
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Dale Johannesen authored
instructions (that would have to be split later) llvm-svn: 35227
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Dale Johannesen authored
llvm-svn: 35226
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Devang Patel authored
Avoid recursion, Use iterative algorithm. llvm-svn: 35225
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Jeff Cohen authored
llvm-svn: 35224
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Jeff Cohen authored
Get pos/neg infinity the correct way. llvm-svn: 35223
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Devang Patel authored
Use ETForest instead of DominatorSet. llvm-svn: 35221
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Lauro Ramos Venancio authored
llvm-svn: 35220
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Evan Cheng authored
llvm-svn: 35219
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Lauro Ramos Venancio authored
mov lr, pc bx lr So, the function was not called. llvm-svn: 35218
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Reid Spencer authored
llvm-svn: 35215
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Reid Spencer authored
llvm-svn: 35214
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Lauro Ramos Venancio authored
llvm-svn: 35213
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Zhou Sheng authored
llvm-svn: 35211
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Evan Cheng authored
llvm-svn: 35208
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Evan Cheng authored
Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool. llvm-svn: 35207
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Evan Cheng authored
llvm-svn: 35206
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Evan Cheng authored
llvm-svn: 35205
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Chris Lattner authored
1) codegen a shift of a register as a shift, not an LEA. 2) teach the RA to convert a shift to an LEA instruction if it wants something in three-address form. This gives us asm diffs like: - leal (,%eax,4), %eax + shll $2, %eax which is faster on some processors and smaller on all of them. and, more interestingly: - movl 24(%esi), %eax - leal (,%eax,4), %edi + movl 24(%esi), %edi + shll $2, %edi Without #2, #1 was a significant pessimization in some cases. This implements CodeGen/X86/shift-codegen.ll llvm-svn: 35204
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Chris Lattner authored
llvm-svn: 35202
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Reid Spencer authored
llvm-svn: 35199
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Reid Spencer authored
llvm-svn: 35198
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Dale Johannesen authored
llvm-svn: 35197
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Dale Johannesen authored
llvm-svn: 35196
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Chris Lattner authored
llvm-svn: 35195
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Reid Spencer authored
llvm-svn: 35194
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- Mar 19, 2007
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Reid Spencer authored
llvm-svn: 35190
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Reid Spencer authored
llvm-svn: 35189
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Reid Spencer authored
Patch by Sheng Zhou. llvm-svn: 35188
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