llvm-svn: 113165

into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163

llvm-svn: 112712

instructions onto the target specific parser, which can do a better job.

llvm-svn: 110889

target specific parsers can adapt the TargetAsmParser to this.

llvm-svn: 110888

MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.

llvm-svn: 110794

llvm-svn: 110793

llvm-svn: 110792

llvm-svn: 110790

llvm-svn: 110788

llvm-svn: 110783

 - Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

llvm-svn: 108664

llvm-svn: 108366

llvm-svn: 108130

and thumb_mode.

llvm-svn: 107133

a simple mapping of register names to IDs to
identify register tokens.

llvm-svn: 100685

to the ARM AsmParser.

llvm-svn: 100232

llvm-svn: 94129

the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.

llvm-svn: 93916

MCAsmParser, and changed the target-specific AsmParsers
to use it.

llvm-svn: 93900

identifier.  There is no way to work around it.

llvm-svn: 93896

the new ParseInstruction method just parses and returns a list of
target operands.  A new MatchInstruction interface is used to
turn the operand list into an MCInst.

This requires new/deleting all the operands, but it also gives 
targets the ability to use polymorphic operands if they want to. 

llvm-svn: 93469

Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.

llvm-svn: 93457

llvm-svn: 93455

mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.

llvm-svn: 92181

llvm-svn: 91481

have been passed as a reference.

llvm-svn: 85823

Daniel Dunbar.
- Reordered the fields in the ARMOperand Mem struct to make the struct smaller.
Making bool's into 1 bit fields and put the MCExpr* fields adjacent to each
other.
- Fixed a number of places in ARMAsmParser.cpp so they have doxygen comments.
- Change the name of ARMAsmParser::ParseRegister() to MaybeParseRegister and
added the bool ParseWriteBack parameter.
- Changed ARMAsmParser::ParseMemory() to call MaybeParseRegister().
- Added ARMAsmParser::ParseMemoryOffsetReg to factor out parsing the offset of a
memory operand.  And use it for both parsing both preindexed and post indexing
addressing forms in ARMAsmParser::ParseMemory.
- Changed the first argument to ParseShift() to a reference.
- Changed ParseShift() to check for Rrx first and return to reduce nesting.

llvm-svn: 85632

llvm-svn: 84600

is just "[Rn]" and no tailing comma with an offset, etc.

llvm-svn: 84205

as expressions, code for parsing a few arm specific directives (still needs
the MCStreamer calls for these).  Some clean up of the operand parsing code
and adding some comments.

llvm-svn: 84201

llvm-svn: 84055

Also fixed a couple of coding style things that crept in.  And added more
to the temporary hacked up ARMAsmParser::MatchInstruction() method for testing.

llvm-svn: 84040

llvm-svn: 83917

should have been a pointer to a reference.

llvm-svn: 83915

lists.  Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on
errors so 0-15 values could be returned as register numbers.  Also added the
rest of the arm register names to the currently hacked up version to allow more
testing.  Some changes to ARMAsmParser::ParseOperand to give different errors
for things not yet supported and some additions to the hacked
ARMAsmParser::MatchInstruction to allow more testing for now.

llvm-svn: 83673

with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.

llvm-svn: 83477

operands.  Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts.  This is a work in progress.

llvm-svn: 83424

parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.

llvm-svn: 81817