Fix zeroExtend and signExtend to support empty sets, and to return the smallest
possible result set which contains the extension of each element in their
inputs. For example zext i8 [100, 10) to i16 is now [0, 256), not i16 [100, 10)
which contains 63446 members.

llvm-svn: 113187

always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530

llvm-svn: 113186

llvm-svn: 113185

llvm-svn: 113184

is busted for all variants, report it as the location.  This allows
us to get the operand right for bugs like:

t.s:3:12: error: invalid operand for instruction
	outb %al, %gs
	          ^

Even though there are reg/imm and reg/reg forms of this instruction.

llvm-svn: 113183

allowing unsigned 8-bit operands.  This fixes rdar://8208481

llvm-svn: 113182

Fixed an error that could occur during disassembly that could cause a function name to be printed before the first _and_ the second instruction of disassembly when there are two symbols -- one debug symbol and one linker symbol. 

llvm-svn: 113181

Fixed a buffer overrun error that could occur every time the program was run due to a "sprintf" with a destination string that was too short. 

llvm-svn: 113180

Fixed an error where a random string would get executed after a recent fix that checked if the window column size was zero was added on the lldb driver startup.

llvm-svn: 113179

of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.

llvm-svn: 113178

llvm-svn: 113177

give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"

llvm-svn: 113176

llvm-svn: 113174

llvm-svn: 113173

llvm-svn: 113172

by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions.  This implements rdar://7785064

llvm-svn: 113171

MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.

llvm-svn: 113170

generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else.  Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic.  This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.

llvm-svn: 113169

so only do the N^2 loop with debug mode.

llvm-svn: 113168

llvm-svn: 113167

failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).

llvm-svn: 113166

llvm-svn: 113165

llvm-svn: 113164

into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163

Working the type_traits area: Hooked up to clang's __is_union.  Got has_trivial_copy_assign working.

llvm-svn: 113162

Fix a C++ PCH problem which was exposed by r113019. CXXBaseOrMemberInitializer's IsWritten and source order is not set.

llvm-svn: 113161

llvm-svn: 113160

llvm-svn: 113159

llvm-svn: 113158

llvm-svn: 113157

llvm-svn: 113156

llvm-svn: 113155

LastFieldBitfield in CGObjCCommonMac::BuildAggrIvarLayout keeps bitfields or unnamed fields but later the code
assumes that it's always a bitfield. This can lead to a crash (reported at rdar://8368320).

llvm-svn: 113154

llvm-svn: 113149

llvm-svn: 113148

llvm-svn: 113147

llvm-svn: 113146

StringMatcher instead of a linear sequence of memcmps.

llvm-svn: 113145

llvm-svn: 113144

llvm-svn: 113143