llvm-svn: 31417

llvm-svn: 31414

llvm-svn: 31413

llvm-svn: 31412

llvm-svn: 31410

llvm-svn: 31409

llvm-svn: 31408

llvm-svn: 31397

llvm-svn: 31387

1. Hash not quite right for DIEValues.

2. Not going to use Usage (no significant benefit.)

llvm-svn: 31384

llvm-svn: 31382

Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380

General clean up of teh dwarf writer.

1. Most significant is the folding of debug information entries.  This
reduced self hosted -g SelectionDAGISel.s from 120M to 13M and pretty
close to matching .o file sizes with gcc.

2. Debug information entry printing for debugging the dwarf code.

3. Bring all the code closer to llvm standards.

4. Misc. fixes and doc clean ups.

llvm-svn: 31379

Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369

no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31366

llvm-svn: 31364

Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together.

llvm-svn: 31363

llvm-svn: 31359

llvm-svn: 31356

it inserts an uncond branch where it is less likely to cause a problem.  This
fixes some perf issues on ppc.

llvm-svn: 31354

llvm-svn: 31347

llvm-svn: 31340

tail is not an entire block for either of them, pick one, split it, then
merge the common part.

llvm-svn: 31336

llvm-svn: 31335

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

llvm-svn: 31330

llvm-svn: 31328

llvm-svn: 31323

llvm-svn: 31319

llvm-svn: 31318

2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311

we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.

llvm-svn: 31310

llvm-svn: 31305

llvm-svn: 31302

generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299

llvm-svn: 31296

llvm-svn: 31295

llvm-svn: 31293

llvm-svn: 31292

successors), and make island block movement more general.

This compiles CodeGen/X86/2006-04-27-ISelFoldingBug.ll to:

_loadAndRLEsource_no_exit_2E_1_label_2E_0:
        subl $8, %esp
        movl %esi, 4(%esp)
        movl %ebx, (%esp)
        movl 16(%esp), %eax
        movl 12(%esp), %ecx
LBB1_3: #label.0
        movl _last, %edx
        movl %edx, %esi
        incl %esi
        movl %esi, _last
        movl %ecx, %ebx
        # TRUNCATE movb %bl, %bl
        movl _block, %esi
        movb %bl, 1(%esi,%edx)
        cmpl %eax, _last
        jge LBB1_2      #codeRepl5.exitStub
LBB1_4: #label.0
        cmpl $257, %ecx
        je LBB1_2       #codeRepl5.exitStub
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
        movl $1, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_2: #codeRepl5.exitStub
        xorl %eax, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret

instead of:

_loadAndRLEsource_no_exit_2E_1_label_2E_0:
        subl $8, %esp
        movl %esi, 4(%esp)
        movl %ebx, (%esp)
        movl 16(%esp), %eax
        movl 12(%esp), %ecx
        jmp LBB1_3      #label.0
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
        movl $1, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_2: #codeRepl5.exitStub
        xorl %eax, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_3: #label.0
        movl _last, %edx
        movl %edx, %esi
        incl %esi
        movl %esi, _last
        movl %ecx, %ebx
        # TRUNCATE movb %bl, %bl
        movl _block, %esi
        movb %bl, 1(%esi,%edx)
        cmpl %eax, _last
        jge LBB1_2      #codeRepl5.exitStub
LBB1_4: #label.0
        cmpl $257, %ecx
        jne LBB1_1      #label.0.no_exit.1_crit_edge.exitStub
        jmp LBB1_2      #codeRepl5.exitStub

... which is much better layout :)

llvm-svn: 31282

llvm-svn: 31281