X86ISelLowering creates.

llvm-svn: 54544

llvm-svn: 54543

llvm-svn: 54542

llvm-svn: 54541

llvm-svn: 54540

llvm-svn: 54539

llvm-svn: 54538

llvm-svn: 54537

llvm-svn: 54536

llvm-svn: 54534

It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.

llvm-svn: 54519

llvm-svn: 54518

llvm-svn: 54516

llvm-svn: 54514

Fixed bug in adjustMipsStackFrame, which was breaking
while trying to access a dead stack object index. Also added
one more alignment before fixing the callee saved registers
stack offset adjustment.

llvm-svn: 54485

llvm-svn: 54461

llvm-svn: 54460

llvm-svn: 54459

llvm-svn: 54458

llvm-svn: 54457

llvm-svn: 54456

llvm-svn: 54455

llvm-svn: 54454

llvm-svn: 54453

llvm-svn: 54452

llvm-svn: 54451

llvm-svn: 54450

llvm-svn: 54449

llvm-svn: 54448

LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.

llvm-svn: 54444

this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.

llvm-svn: 54418

llvm-svn: 54411

Added fp register clobbering during calls.
Added AsmPrinter support for "fmask", a bitmask that indicates where on the 
stack the fp callee saved registers are.

Fixed the stack frame layout for Mips, now the callee saved regs 
are in the right stack location (a little documentation about how this
stack frame must look like is present in MipsRegisterInfo.cpp).
This was done using the method MipsRegisterInfo::adjustMipsStackFrame
To be more clear, these are examples of what is solves :  

1) FP and RA are also callee saved, and despite they aren't in CSI they 
   must be saved before the fp callee saved registers. 
2) The ABI requires that local varibles are allocated before the callee 
   saved register area, the opposite behavior from the default allocation.
3) CPU and FPU saved register area must be aligned independent of each
   other.

llvm-svn: 54403

llvm-svn: 54376

llvm-svn: 54350

llvm-svn: 54336

- Add a basic machine-level dead block eliminator.

These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.

llvm-svn: 54333

llvm-svn: 54329

aren't used anyway, they also used to broke compiling when fastcc was specified for a
function, but not anymore.

llvm-svn: 54316

llvm-svn: 54315