- May 05, 2011
-
-
Bill Wendling authored
who used this flag, and it now emits CFI and doesn't emit this anymore. All other targets left this flag "false". <rdar://problem/8486371> llvm-svn: 130918
-
Mikhail Glushenkov authored
llvm-svn: 130915
-
Mikhail Glushenkov authored
llvm-svn: 130914
-
Nick Lewycky authored
crash. llvm-svn: 130911
-
Nick Lewycky authored
llvm-svn: 130903
-
Nick Lewycky authored
filename. llvm-svn: 130897
-
Jakob Stoklund Olesen authored
Joining physregs is inherently dangerous because it uses a heuristic to avoid creating invalid code. Linear scan had an emergency spilling mechanism to deal with those rare cases. The new greedy allocator does not. The greedy register allocator is much better at taking hints, so this has almost no impact on code size and quality. The few cases where it matters show up as unit tests that now have -join-physregs enabled explicitly. llvm-svn: 130896
-
Devang Patel authored
llvm-svn: 130895
-
Devang Patel authored
llvm-svn: 130894
-
Jakob Stoklund Olesen authored
llvm-svn: 130893
-
Jakob Stoklund Olesen authored
It is OK for B to be any GR8_ABCD_H superclass, the returned register class doesn't have to map surjectively onto B. llvm-svn: 130892
-
Jakob Stoklund Olesen authored
Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. llvm-svn: 130891
-
Bill Wendling authored
llvm-svn: 130889
-
Ted Kremenek authored
llvm-svn: 130885
-
Dan Gohman authored
the default register allocator is changed. llvm-svn: 130883
-
Bill Wendling authored
landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> llvm-svn: 130881
-
Devang Patel authored
llvm-svn: 130880
-
Nick Lewycky authored
That's kinda weird because the .gcno files are supposed to already be there, but libgcov does this and somehow Google has managed to depend on it. llvm-svn: 130879
-
Eli Friedman authored
Original message: Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . llvm-svn: 130877
-
- May 04, 2011
-
-
Devang Patel authored
llvm-svn: 130876
-
Galina Kistanova authored
This test fails on ARM. The test shouldn't explicitly specify alignment (and alignment 4 is wrong) and requires hard-float. llvm-svn: 130875
-
Devang Patel authored
If builder is initialized using an instruction as insertion point, then use the instruction's debug location as current debug location. llvm-svn: 130874
-
Devang Patel authored
llvm-svn: 130869
-
Eli Friedman authored
llvm-svn: 130867
-
Eli Friedman authored
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . llvm-svn: 130862
-
Duncan Sands authored
llvm-svn: 130860
-
Jakob Stoklund Olesen authored
llvm-svn: 130859
-
Jakob Stoklund Olesen authored
These tests all follow the same pattern: mov r2, r0 movs r0, #0 $CMP r2, r1 it eq moveq r0, #1 bx lr The first 'mov' can be eliminated by rematerializing 'movs r0, #0' below the test instruction: $CMP r0, r1 mov.w r0, #0 it eq moveq r0, #1 bx lr So far, only physreg coalescing can do that. The register allocators won't yet split live ranges just to eliminate copies. They can learn, but this particular problem is not likely to show up in real code. It only appears because r0 is used for both the function argument and return value. llvm-svn: 130858
-
Jakob Stoklund Olesen authored
llvm-svn: 130857
-
Jakob Stoklund Olesen authored
llvm-svn: 130856
-
Jakob Stoklund Olesen authored
llvm-svn: 130855
-
Devang Patel authored
llvm-svn: 130854
-
Rafael Espindola authored
llvm-svn: 130850
-
Akira Hatanaka authored
llvm-svn: 130849
-
Akira Hatanaka authored
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
-
Rafael Espindola authored
it is both inefficient and unexpected by dwarfdump. Change to a DW_FORM_data4. While in here, change the predicate name to reflect that the position is not really absolute (it is an offset), just that the linker needs a relocation. llvm-svn: 130846
-
Jakob Stoklund Olesen authored
Physreg joining is still on by default, but I will turn it off shortly. llvm-svn: 130844
-
Devang Patel authored
Tighten up check for empty (i.e. no meaningful debug info) module. This fixes dwarf-die2.c test case from gcc test suite. llvm-svn: 130842
-
Duncan Sands authored
but according to my super-optimizer there are only two missed simplifications of -instsimplify kind when compiling bzip2, and this is one of them. It amuses me to have bzip2 be perfectly optimized as far as instsimplify goes! llvm-svn: 130840
-
Nick Lewycky authored
frontend, if applicable. llvm-svn: 130835
-