llvm-svn: 123934

llvm-svn: 123933

llvm-svn: 123932

There should be no functional change from this, but I think it's simpler this
way.

llvm-svn: 123931

llvm-svn: 123930

llvm-svn: 123929

llvm-svn: 123928

- Use a more appropriate name for Owen's ARM Parser isMCR hack since the same operands can be present
 in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions.
- Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t
hem.

llvm-svn: 123927

The value mapping gets confused about which original values have multiple new
definitions so they may need phi insertions.

This could probably be simplified by letting enterIntvBefore() take a live range
to be added following the instruction. As long as the range stays inside the
same basic block, value mapping shouldn't be a problem.

llvm-svn: 123926

llvm-svn: 123925

    rdar://problem/8875425 Found mySource->isa local variable assertion failed

has been fixed.

llvm-svn: 123924

analysis for short-circuited operations.  For branch written like "if (x && y)",
we maintain two sets of dataflow values for the outgoing
branches.  This suppresses some common false positives
for -Wuninitialized-experimental.

This change introduces some assertion failures
when running on the LLVM codebase.  WIP.

llvm-svn: 123923

vf calls, be made indirect. This patch is towards that goal.

llvm-svn: 123922

and methods defined within 'namespace X { ... }'.

llvm-svn: 123921

references. Note that we're currently failing reference binding to a
function lvalue.

llvm-svn: 123920

llvm-svn: 123919

working paper's structure. The only functional change here is that we
now handling binding to array rvalues, which we would previously reject.

llvm-svn: 123918

llvm-svn: 123917

llvm-svn: 123916

usese 100% CPU and times out, so it's annoying to run it.

llvm-svn: 123915

llvm-svn: 123914

involving rvalue references, to start scoping out what is and what
isn't implemented. In the process, tweak some standards citations,
type desugaring, and teach the tentative parser about && in
ptr-operator.

llvm-svn: 123913

llvm-svn: 123912

auto-simplier the transform most missed by early-cse is (zext X) != 0 -> X != 0.
This patch adds this transform and some related logic to InstructionSimplify
and removes some of the logic from instcombine (unfortunately not all because
there are several situations in which instcombine can improve things by making
new instructions, whereas instsimplify is not allowed to do this).  At -O2 this
often results in more than 15% more simplifications by early-cse, and results in
hundreds of lines of bitcode being eliminated from the testsuite.  I did see some
small negative effects in the testsuite, for example a few additional instructions
in three programs.  One program, 483.xalancbmk, got an additional 35 instructions,
which seems to be due to a function getting an additional instruction and then
being inlined all over the place.

llvm-svn: 123911

llvm-svn: 123910

llvm-svn: 123909

to add/sub by doing the normal operation and then checking for overflow
afterwards. This generally relies on the DAG handling the later invalid
operations as well.

Fixes the 64-bit part of rdar://8622122 and rdar://8774702.

llvm-svn: 123908

llvm-svn: 123907

llvm-svn: 123906

TargetInstrInfo:
Change produceSameValue() to take MachineRegisterInfo as an optional argument.
When in SSA form, targets can use it to make more aggressive equality analysis.

Machine LICM:
1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead.
2. Fix a bug which prevent CSE of instructions which are not re-materializable.
3. Use improved form of produceSameValue.

ARM:
1. Teach ARM produceSameValue to look pass some PIC labels.
2. Look for operands from different loads of different constant pool entries
   which have same values.
3. Re-implement PIC GA materialization using movw + movt. Combine the pair with
   a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible
   to re-materialize the instruction, allow machine LICM to hoist the set of
   instructions out of the loop and make it possible to CSE them. It's a bit
   hacky, but it significantly improve code quality.
4. Some minor bug fixes as well.

With the fixes, using movw + movt to materialize GAs significantly outperform the
load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap
and 176.gcc ~10%.

llvm-svn: 123905

Part of the fix for PR8413.

llvm-svn: 123904

while the inferior is running) to be fast. The previous code would always
cause the sender to timeout, yet still return success due to the way we
were waiting for a value (incorrect value) to change. Now the ProcessGDBRemote
plug-in has a public and private "is running" predicate. This allows things
that need to send async packets to interrupt and wait for the private "is running"
state to be flipped to false, and then resume quickly with no timeout. 

llvm-svn: 123903

llvm-svn: 123902

llvm-svn: 123901

When instantiating member functions, propagate whether the member function is marked 'final' and 'override'.

Also, call CheckOverrideControl when instantiating member functions.

llvm-svn: 123900

llvm-svn: 123899

llvm-svn: 123898

llvm-svn: 123897

llvm-svn: 123896

llvm-svn: 123895