now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)

llvm-svn: 28839

llvm-svn: 28838

llvm-svn: 28837

the target triple & subtarget info.  woo.

llvm-svn: 28835

Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830

add a new init method.

llvm-svn: 28828

support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825

can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824

that is currently just like ppc32 :)

llvm-svn: 28813

llvm-svn: 28808

2. Add vector support.

llvm-svn: 28807

llvm-svn: 28798

llvm-svn: 28797

llvm-svn: 28796

vector types are passed via XMM registers.

llvm-svn: 28789

llvm-svn: 28787

llvm-svn: 28783

functions.

llvm-svn: 28781

llvm-svn: 28772

llvm-svn: 28769

ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.

llvm-svn: 28768

llvm-svn: 28765

llvm-svn: 28764

allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.

llvm-svn: 28761

Olden/power (and probably others) with -regalloc=local.

llvm-svn: 28760

llvm-svn: 28753

llvm-svn: 28752

implement SelectFrameIndex

llvm-svn: 28751

nodes correctly.

llvm-svn: 28745

as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.

llvm-svn: 28744

llvm-svn: 28737

llvm-svn: 28736

llvm-svn: 28728

function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703

when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).

llvm-svn: 28697

llvm-svn: 28696

expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691

llvm-svn: 28683

llvm-svn: 28682

llvm-svn: 28679