of the instruction definitions using Pat<>.

llvm-svn: 140644

a suboptimal schedule.

llvm-svn: 140643

Naming conventions consistency. No functional change.

llvm-svn: 140636

Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit.

If someone prefers %tmp42 to %42, run instnamer.

llvm-svn: 140634

require special case handling.
rdar://10117377

llvm-svn: 140629

llvm-svn: 140626

llvm-svn: 140625

llvm-svn: 140624

a couple of outstanding issues with frame objects occuring as instruction
operands.

llvm-svn: 140616

llvm-svn: 140615

Return numbers of 64-bit registers.

llvm-svn: 140609

llvm-svn: 140607

llvm-svn: 140606

Add a new method: getAnyExtOrTrunc and use it to replace the manual check.

llvm-svn: 140603

while the decision is to bit-pack small values.

llvm-svn: 140601

llvm-svn: 140598

llvm-svn: 140593

split landingpad instructions into a PHI node.
PR11016

llvm-svn: 140592

Disabling aggressive LSR saves compilation time, and with the new
indvars behavior usually improves performance.

llvm-svn: 140590

llvm-svn: 140583

llvm-svn: 140581

The minor bug heuristic was noticed by inspection. I added the
isLoser/isValid helpers because they will become more
important with subsequent checkins.

llvm-svn: 140580

llvm-svn: 140570

llvm-svn: 140569

registers, so there is no need to check here.

llvm-svn: 140568

llvm-svn: 140560

Enhance alias analysis for atomic instructions a bit.  Upgrade a couple alias-analysis tests to the new atomic instructions.

llvm-svn: 140557

llvm-svn: 140556

llvm-svn: 140549

llvm-svn: 140548

printing of local offsets

llvm-svn: 140547

Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more.

llvm-svn: 140539

llvm-svn: 140536

llvm-svn: 140535

llvm-svn: 140534

llvm-svn: 140533

llvm-svn: 140532

PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval

llvm-svn: 140516

llvm-svn: 140515

Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

llvm-svn: 140472