llvm-svn: 90281

instead of returning an ambiguous reason.

llvm-svn: 90275

- A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber.
- If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range.
- Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature".

llvm-svn: 90269

llvm-svn: 90258

llvm-svn: 90257

framework omits differentiated edge sources in the case where the labels
are empty strings.

llvm-svn: 90254

llvm-svn: 90253

llvm-svn: 90252

Clear function specific containers while processing end of a function, even if DW_TAG_subprogram for current function is not found.

llvm-svn: 90247

llvm-svn: 90246

llvm-svn: 90243

We want LiveVariables clients to use methods rather than accessing the
getVarInfo data structure directly. That way it will be possible to change the
LiveVariables representation.

llvm-svn: 90240

llvm-svn: 90217

precisely, which prevents us from infinitely peeling the loop.

llvm-svn: 90211

This means that well connected blocks are copy coalesced before the less connected blocks. Connected blocks are more difficult to
coalesce because intervals are more complicated, so handling them first gives a greater chance of success.

llvm-svn: 90194

DICompileUnit. This code now prints debug filenames successfully.

llvm-svn: 90181

llvm-svn: 90180

For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.

Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
llvm-svn: 90173

llvm-svn: 90172

llvm-svn: 90166

llvm-svn: 90165

New virtual registers created for spill intervals should inherit allocation hints from the original register.

This helps us avoid silly copies when rematting values that are copied to a physical register:

leaq	_.str44(%rip), %rcx
movq	%rcx, %rsi
call	_strcmp

becomes:

leaq	_.str44(%rip), %rsi
call	_strcmp

The coalescer will not touch the movq because that would tie down the physical register.

llvm-svn: 90163

branches even when optimizing for code size.  Unless we find evidence to the
contrary in the future, the special treatment for indirect branches does not
have a significant effect on code size, and performance still matters with -Os.

llvm-svn: 90147

for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low.  The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.

llvm-svn: 90144

llvm-svn: 90141

llvm-svn: 90136

llvm-svn: 90135

llvm-svn: 90134

llvm-svn: 90133

 * Do not SEGFAULT if tree entryNode() is NULL
 * Print function names in dotty printer

llvm-svn: 90130

llvm-gcc build.

llvm-svn: 90113

divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.

llvm-svn: 90108

and reverse nonlocal memdep maps in synch, this should
fix 255.vortex.

llvm-svn: 90107

This permits the devirtualization of llvm.org/PR3100#c9 when compiled by clang.

llvm-svn: 90099

llvm-svn: 90097

    LLVM::Transforms/GVN/2009-02-17-LoadPRECrash.ll
    LLVM::Transforms/GVN/2009-06-17-InvalidPRE.ll

llvm-svn: 90096

was being added to the Result vector, but not being put in the
cache.  This means that if the cache was reused wholesale for a
later query that it would be missing this entry and we'd do an
incorrect load elimination.

Unfortunately, it's not really possible to write a useful 
testcase for this, but this unbreaks 255.vortex.

llvm-svn: 90093

llvm-svn: 90089

llvm-svn: 90085

llvm-svn: 90083