ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.

llvm-svn: 135465

llvm-svn: 135464

Make isLoadExtLegal and isTruncStoreLegal check what the name says. :)  This might have some minor effect on CellSPU, but all other targets should be unaffected.  Fixing per report from Damien Vincent on llvmdev.

llvm-svn: 135462

llvm-svn: 135458

Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block.

llvm-svn: 135457

Revert r135423.

llvm-svn: 135454

llvm-svn: 135453

llvm-svn: 135452

llvm-svn: 135451

llvm-svn: 135450

llvm-svn: 135449

llvm-svn: 135448

wasn't being initialized by the enhanced disassembler,
leading to assertion failures. 

llvm-svn: 135447

llvm-svn: 135446

library.

llvm-svn: 135443

Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding.  This resolves another conflict when bringing up the new-style disassembler.

llvm-svn: 135442

use of TargetFrameLowering in TargetAsmInfo.

llvm-svn: 135439

better location welcome).

llvm-svn: 135438

Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler.

llvm-svn: 135434

errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

llvm-svn: 135431

llvm-svn: 135427

llvm-svn: 135426

to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424

During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
[take 2]

llvm-svn: 135423

For -disable-iv-rewrite, perform LFTR without generating a new
"canonical" induction variable. Instead find the "best" existing
induction variable for use in the loop exit test and compute the final
value of that IV for use in the new loop exit test. In short,
convert to a simple eq/ne exit test as long as it's cheap to do so.

llvm-svn: 135420

llvm-svn: 135418

moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.

llvm-svn: 135415

Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode.  Update the ARM disassembler for this change.

llvm-svn: 135414

When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.

We need the value number entering the instruction.

<rdar://problem/9793765>

llvm-svn: 135413

not interfere with BackedgeTakenCount computation.

llvm-svn: 135412

preheader for the sole purpose of LFTR, since LFTR itself is usually not
a clear optimization.

llvm-svn: 135409

definitions.

llvm-svn: 135407

llvm-svn: 135404

virtual registers are used. 

llvm-svn: 135403

Make all of the RecTy constructors private, and use get() factory
methods instead. Return singleton instances when it makes sense.

ListTy instance pointers are stored in the element RecTy instance.

BitsRecTy instance pointers, one per length, are stored in a static vector.

Also unique DefInit instances. A Record has a unique DefInit which
has a unique RecordRecTy instance.

This saves some 200k-300k RecTy allocations when parsing ARM.td. It
reduces TableGen's heap usage by almost 50%.

llvm-svn: 135399

llvm-svn: 135396

llvm-svn: 135394

Hopefully fix some GCC-based buildbots. GCC apparently decays the array to a pointer here before overload resolution, so construct with an explicit length instead.

llvm-svn: 135391

Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used.
Mostly mechanical with some manual reformatting.

llvm-svn: 135390

Introduce the 'makeArrayRef(...)' family of functions, which fills a similar role for ArrayRef<> as std::make_pair() fills for std::pair<>: they return the right instantiation of ArrayRef<T> based on the types of the parameters.

They mostly mirror the ArrayRef constructors, with two exceptions:
 * There's no function mirroring the default constructor because it wouldn't have any parameters to deduce the right ArrayRef<T> from.
 * There's an explicit SmallVector<T> overload in addition to the SmallVectorImpl<T> overload. Without it, the single-element overload would try to create an ArrayRef<Smallvector<T> > because it's a better match according to the overloading rules. (And both overloads are used in the current tree, so neither is redundant)

llvm-svn: 135389