that still fails (because all the register spill weights are inf), just grab
one.

llvm-svn: 28262

llvm-svn: 28255

llvm-svn: 28254

llvm-svn: 28253

llvm-svn: 28252

llvm-svn: 28250

        %tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.

llvm-svn: 28244

TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238

llvm-svn: 28236

llvm-svn: 28235

simplify tf(x,y,y,z) -> tf(x,y,z).

llvm-svn: 28233

If a two-address code whose first operand has uses below, it should be commuted
when possible.

llvm-svn: 28230

separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226

spilled.

llvm-svn: 28220

llvm-svn: 28219

the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

llvm-svn: 28217

llvm-svn: 28212

llvm-svn: 28207

ppc

llvm-svn: 28205

the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201

llvm-svn: 28200

llvm-svn: 28197

Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.

llvm-svn: 28194

llvm-svn: 28192

of code to be unified.

llvm-svn: 28191

Don't prefix section directives with a tab.  Doing so causes blank lines to
be emitted to the .s file.

llvm-svn: 28189

llvm-svn: 28188

llvm-svn: 28186

llvm-svn: 28184

short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28175

_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}

llvm-svn: 28174

short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret

llvm-svn: 28171

llvm-svn: 28167

to be only 31.25% dense, rather than 75% dense.

llvm-svn: 28165

llvm-svn: 28161

llvm-svn: 28152

llvm-svn: 28151

llvm-svn: 28150

llvm-svn: 28148

sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28146