The only functionality change is that we now implement:
  Regression/Transforms/TailCallElim/intervening-inst.ll

Which is really kinda pointless, because it means that trivially dead code
does not interfere with -tce, but trivially dead code probably wouldn't be
around anytime when this pass is run anyway.

The point of including this change it to support other more aggressive
transformations when we have the analysis capabilities to do so.

llvm-svn: 10312

llvm-svn: 10305

* Transform: free <ty>* (cast <ty2>* X to <ty>*) into free <ty2>* X

llvm-svn: 10303

which never worked itself.  The cee pass still doesn't work, but it doesn't use
this method anymore anyway, so eliminate the method.

llvm-svn: 10302

on the algorithm for directly computing immediate dominators presented in this
paper:

  A Fast Algorithm for Finding Dominators in a Flowgraph
  T. Lengauer & R. Tarjan, ACM TOPLAS July 1979, pgs 121-141.

This _substantially_ speeds up construction of all dominator related information.
Post-dominators to follow.

llvm-svn: 10301

Move method out of generic dominators construction code

llvm-svn: 10299

this point, the second operand must be a physical register (it cannot
be a virtual one).

llvm-svn: 10292

potential register assignment.

llvm-svn: 10291

llvm-svn: 10290

llvm-svn: 10289

llvm-svn: 10288

Fix regressions ScalarRepl/basictest.ll & arraytest.ll

llvm-svn: 10287

Eventually.

llvm-svn: 10284

each basic block in function.  Instead, just emit a stream of instructions,
chopping up basic blocks based on when we find terminator instructions.  This
saves a fairly substantial chunk of bytecode space.  In stripped, sample
cases, for example, we get this reduction in size:

197.parser: 163036 -> 137180:  18.8% reduction
254.gap   : 844936 -> 689392:  22.6%
255.vortex: 621724 -> 528444:  17.7%

...

Not bad for something this simple.  :)  Note that this doesn't require a new
bytecode version number at all, though version 1.1 should not need to support
the old format.

llvm-svn: 10280

Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel.  Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code.  Each of these is a fairly substantial job, so this will remain disabled
for the immediate future.  :(

llvm-svn: 10276

folding of instructions into addressing modes.  This creates lots of dead
instructions, which are currently not deleted.  It also creates a lot of
instructions that the X86 backend currently cannot handle.  :(

llvm-svn: 10275

llvm-svn: 10274

bug where spill instructions were added to the next basic block
instead of the end of the current one if the instruction that required
the spill was the last in the block.

llvm-svn: 10272

llvm-svn: 10270

llvm-svn: 10268

If this doesn't work Misha, feel free to revert it.

llvm-svn: 10267

allow unaligned loads, that is probably the problem I've been seeing in numerous
SPARC test cases failing. X86, on the other hand, just slows down unaligned
accesses, since it must make 2 aligned accesses for each unaligned one.

llvm-svn: 10266

Some gep generalization changes

llvm-svn: 10252

llvm-svn: 10236

llvm-svn: 10232

llvm-svn: 10231

llvm-svn: 10229

llvm-svn: 10228

llvm-svn: 10226

llvm-svn: 10225

llvm-svn: 10224

llvm-svn: 10221

llvm-svn: 10219

llvm-svn: 10218

llvm-svn: 10217

llvm-svn: 10210

llvm-svn: 10204

llvm-svn: 10197

llvm-svn: 10193

the other way around, instead of failing a large, tumor-like assertion.

llvm-svn: 10171